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authorAkshay Adiga <akshay.adiga@linux.vnet.ibm.com>2017-09-15 17:50:59 +0530
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-09-19 04:16:53 -0500
commitd2c82baae887568e29017e0a2902db7e51284c5f (patch)
tree56e6851fc7d328aa509f04786124a318b0e3501c /hw
parent1eb77e6332d61b5f70a04dcedcbf6c32d25f5a9c (diff)
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SLW: Configure self-restore for HRMOR
Make a stop api call using libpore to restore HRMOR register. HRMOR needs to be cleared so that when thread exits stop, they arrives at linux system_reset vector (0x100). Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com> Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/slw.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/hw/slw.c b/hw/slw.c
index a1ed7ba..39aa4d0 100644
--- a/hw/slw.c
+++ b/hw/slw.c
@@ -1254,12 +1254,41 @@ static void slw_patch_regs(struct proc_chip *chip)
static void slw_init_chip_p9(struct proc_chip *chip)
{
struct cpu_thread *c;
+ int rc;
prlog(PR_DEBUG, "SLW: Init chip 0x%x\n", chip->id);
/* At power ON setup inits for power-mgt */
for_each_available_core_in_chip(c, chip->id)
slw_set_overrides_p9(chip, c);
+
+ if (!chip->homer_base) {
+ log_simple_error(&e_info(OPAL_RC_SLW_REG),
+ "SLW: HOMER base not set %x\n",
+ chip->id);
+ return;
+ }
+
+ prlog(PR_NOTICE, "SLW: Configuring self-restore for HRMOR\n");
+
+ /* Should this be for_each_present_cpu() ? */
+ for_each_available_cpu(c) {
+ if (c->chip_id != chip->id)
+ continue;
+
+ /*
+ * Clear HRMOR. Need to update only for thread
+ * 0 of each core. Doing it anyway for all threads
+ */
+ rc = p9_stop_save_cpureg((void *)chip->homer_base,
+ P9_STOP_SPR_HRMOR, 0,
+ c->pir);
+ if (rc) {
+ log_simple_error(&e_info(OPAL_RC_SLW_REG),
+ "SLW: Failed to set HRMOR for CPU %x,RC=0x%x\n",
+ c->pir, rc);
+ }
+ }
}
static void slw_init_chip(struct proc_chip *chip)
{