diff options
| author | Michael Neuling <mikey@neuling.org> | 2017-09-12 14:56:15 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-09-12 23:04:07 -0500 |
| commit | 906d25d864a1d72c948a475570c53ca88081afb3 (patch) | |
| tree | 525f6aee3ab75f61f12760bf5fa0695ed09791d8 /hw | |
| parent | 2ba68c4886b27d25a96a6024370fbab1a9b85ff5 (diff) | |
| download | skiboot-906d25d864a1d72c948a475570c53ca88081afb3.zip skiboot-906d25d864a1d72c948a475570c53ca88081afb3.tar.gz skiboot-906d25d864a1d72c948a475570c53ca88081afb3.tar.bz2 | |
phb4: Move nvram read of pci-eeh-mmio init
Move nvram read to the PHB4 init code so that's it's only read once,
rather than every time we go though PHB reset.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/phb4.c | 4 |
1 files changed, 3 insertions, 1 deletions
@@ -140,6 +140,7 @@ static void phb4_init_hw(struct phb4 *p, bool first_init); static bool verbose_eeh; static bool pci_tracing; +static bool pci_eeh_mmio; enum capi_dma_tvt { CAPI_DMA_TVT0, @@ -4169,7 +4170,7 @@ static void phb4_init_hw(struct phb4 *p, bool first_init) val |= PHB_CTRLR_IRQ_STORE_EOI; } - if (nvram_query_eq("pci-eeh-mmio", "disabled")) + if (!pci_eeh_mmio) val |= PHB_CTRLR_MMIO_EEH_DISABLE; out_be64(p->regs + PHB_CTRLR, val); @@ -4946,6 +4947,7 @@ void probe_phb4(void) prlog(PR_INFO, "PHB4: Verbose EEH enabled\n"); pci_tracing = nvram_query_eq("pci-tracing", "true"); + pci_eeh_mmio = !nvram_query_eq("pci-eeh-mmio", "disabled"); /* Look for PBCQ XSCOM nodes */ dt_for_each_compatible(dt_root, np, "ibm,power9-pbcq") phb4_probe_pbcq(np); |