xive: Ensure pressure relief interrupts are disabled

We don't use them and we hijack the VP field with their
configuration to store the EQ reference, so make sure the
kernel or guest can't turn them back on by doing MMIO
writes to ACK#

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/hw/xive.c b/hw/xive.c
index 9148c5f..d6628a0 100644
--- a/hw/xive.c
+++ b/hw/xive.c
@@ -1623,6 +1623,8 @@ static bool xive_config_init(struct xive *x)
 #endif
 	val |= PC_TCTXT_CHIPID_OVERRIDE;
 	val |= PC_TCTXT_CFG_TARGET_EN;
+	/* Disable pressure relief as we hijack the field in the VPs */
+	val &= ~PC_TCTXT_CFG_STORE_ACK;
 	val = SETFIELD(PC_TCTXT_CHIPID, val, x->block_id);
 	xive_regw(x, PC_TCTXT_CFG, val);
 	xive_dbg(x, "PC_TCTXT_CFG=%016llx\n", val);