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authorRussell Currey <ruscur@russell.cc>2017-06-24 14:17:11 -0500
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-06-26 14:28:58 +1000
commitc40c9c75dfaefba227af9c4b5c03277e6d684690 (patch)
tree1a77cea24fdf481aefb76433c62eb2c7d3e4f645 /hw
parent82546c64a890e677c6bf5b2d1e276f43020f45d3 (diff)
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phb4: Properly mask out link down errors during reset
Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/phb4.c27
1 files changed, 20 insertions, 7 deletions
diff --git a/hw/phb4.c b/hw/phb4.c
index a2641b8..3ee618e 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -1892,13 +1892,17 @@ static void phb4_prepare_link_change(struct pci_slot *slot, bool is_up)
/* Don't block PCI-CFG */
p->flags &= ~PHB4_CFG_BLOCKED;
- /* Clear error link enable & error link down kill enable */
- out_be64(p->regs + PHB_PCIE_MISC_STRAP, 0);
-
- /* Disable all error status indicators that trigger irqs */
- out_be64(p->regs + PHB_REGB_ERR_INF_ENABLE, 0);
- out_be64(p->regs + PHB_REGB_ERR_ERC_ENABLE, 0);
- out_be64(p->regs + PHB_REGB_ERR_FAT_ENABLE, 0);
+ /* Re-enable link down errors */
+ out_be64(p->regs + PHB_PCIE_MISC_STRAP,
+ 0x0000060000000000ull);
+
+ /* Re-enable error status indicators that trigger irqs */
+ out_be64(p->regs + PHB_REGB_ERR_INF_ENABLE,
+ 0x2130006efca8bc00ull);
+ out_be64(p->regs + PHB_REGB_ERR_ERC_ENABLE,
+ 0x0000000000000000ull);
+ out_be64(p->regs + PHB_REGB_ERR_FAT_ENABLE,
+ 0xde8fff91035743ffull);
/*
* We might lose the bus numbers during the reset operation
@@ -1919,6 +1923,15 @@ static void phb4_prepare_link_change(struct pci_slot *slot, bool is_up)
reg32 |= PCIECAP_AER_CE_RECVR_ERR;
phb4_pcicfg_write32(&p->phb, 0, p->aercap +
PCIECAP_AER_CE_MASK, reg32);
+
+ /* Clear error link enable & error link down kill enable */
+ out_be64(p->regs + PHB_PCIE_MISC_STRAP, 0);
+
+ /* Disable all error status indicators that trigger irqs */
+ out_be64(p->regs + PHB_REGB_ERR_INF_ENABLE, 0);
+ out_be64(p->regs + PHB_REGB_ERR_ERC_ENABLE, 0);
+ out_be64(p->regs + PHB_REGB_ERR_FAT_ENABLE, 0);
+
/* Block PCI-CFG access */
p->flags |= PHB4_CFG_BLOCKED;
}