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| author | Oliver O'Halloran <oohall@gmail.com> | 2020-08-27 13:45:25 +1000 |
|---|---|---|
| committer | Oliver O'Halloran <oohall@gmail.com> | 2020-08-28 14:29:15 +1000 |
| commit | 9b594262eeec7699836ff50c8762241d1f2570a3 (patch) | |
| tree | f23d68731aff4ad1dcbe2f588417131d7952e88e /hw | |
| parent | 78766c9431245b4670d6e2c15c3f539934cea8e6 (diff) | |
| download | skiboot-9b594262eeec7699836ff50c8762241d1f2570a3.zip skiboot-9b594262eeec7699836ff50c8762241d1f2570a3.tar.gz skiboot-9b594262eeec7699836ff50c8762241d1f2570a3.tar.bz2 | |
hw/phb4: Actually enable error reporting
PHB3 had an errata about correctable errors and when Ben was doing the
initial PHB4 port he deleted the corresponding config write to DEVCTL.
Whoops.
Cc: skiboot-stable@lists.ozlabs.org
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/phb4.c | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -785,6 +785,7 @@ static void phb4_endpoint_init(struct phb *phb, val16 |= (PCICAP_EXP_DEVCTL_NFE_REPORT | PCICAP_EXP_DEVCTL_FE_REPORT | PCICAP_EXP_DEVCTL_UR_REPORT); + pci_cfg_write16(phb, bdfn, ecap + PCICAP_EXP_DEVCTL, val16); /* Enable ECRC generation and check */ pci_cfg_read32(phb, bdfn, aercap + PCIECAP_AER_CAPCTL, &val32); |