opal: Handle TB residue and HDEC parity HMI errors on split core.

In case of split core, some of the Timer facility errors needs cleanup to be
done before we proceed with the error recovery.

Certain TB/HDEC errors leaves dirty data in timebase and HDEC registers,
which need to cleared before we initiate clear_tb_errors through TFMR[24].
The cleanup has to be done by any one thread from core or subcore.

In split core mode, it is required to clear the dirty data from TB/HDEC
register by all subcores (active partitions) before we clear tb errors
through TFMR[24]. The HMI recovery would fail even if one subcore do
not cleanup the respective TB/HDEC register. Dirty data can be cleaned by
writing zero's to TB/HDEC register.

For un-split core, any one thread can do the cleanup.
For split core, any one thread from each subcore can do the cleanup.

Errors that required pre-recovery cleanup:
- SPR_TFMR_TB_RESIDUE_ERR
- SPR_TFMR_HDEC_PARITY_ERROR

This patch implements pre-recovery steps to clean dirty data from TB/HDEC
register for above mentioned timer facility errors.

Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 10 insertions, 13 deletions

diff --git a/hw/chiptod.c b/hw/chiptod.c
index d51ce2b..e5c3a22 100644
--- a/hw/chiptod.c
+++ b/hw/chiptod.c
@@ -650,14 +650,12 @@ static bool tfmr_recover_tb_errors(uint64_t tfmr)
 	if (tfmr & SPR_TFMR_TB_MISSING_STEP)
 		tfmr_reset_error |= SPR_TFMR_TB_MISSING_STEP;
 
-	if (tfmr & SPR_TFMR_TB_RESIDUE_ERR) {
-		/* To recover TB residue error, reset the TB register. */
-		mtspr(SPR_TBWU, 0);
-		mtspr(SPR_TBWL, 0);
-
-		/* write 1 to bit 45 to clear the error */
+	/*
+	 * write 1 to bit 45 to clear TB residue the error.
+	 * TB register has already been reset to zero as part pre-recovery.
+	 */
+	if (tfmr & SPR_TFMR_TB_RESIDUE_ERR)
 		tfmr_reset_error |= SPR_TFMR_TB_RESIDUE_ERR;
-	}
 
 	if (tfmr & SPR_TFMR_FW_CONTROL_ERR)
 		tfmr_reset_error |= SPR_TFMR_FW_CONTROL_ERR;
@@ -689,13 +687,12 @@ static bool tfmr_recover_non_tb_errors(uint64_t tfmr)
 {
 	uint64_t tfmr_reset_errors = 0;
 
-	if (tfmr & SPR_TFMR_HDEC_PARITY_ERROR) {
-		/* Reset HDEC register */
-		mtspr(SPR_HDEC, 0);
-
-		/* Set bit 26 to clear TFMR HDEC parity error. */
+	/*
+	 * write 1 to bit 26 to clear TFMR HDEC parity error.
+	 * HDEC register has already been reset to zero as part pre-recovery.
+	 */
+	if (tfmr & SPR_TFMR_HDEC_PARITY_ERROR)
 		tfmr_reset_errors |= SPR_TFMR_HDEC_PARITY_ERROR;
-	}
 
 	if (tfmr & SPR_TFMR_DEC_PARITY_ERR) {
 		/* Set DEC with all ones */