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author | Nicholas Piggin <npiggin@gmail.com> | 2021-10-01 20:46:47 +1000 |
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committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-10-02 10:30:27 +0530 |
commit | dda72e7ff60c36ed5ed721ad2b7f6277f7a9363f (patch) | |
tree | 66d42ca9a2648c2008a63be4670837a4b5a5c148 /hw/xscom.c | |
parent | 7744e8ac4b5ad066fee21761f1696707127e0408 (diff) | |
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external/mambo: Updates for POWER10 configuration for DD2.0
Update PVR and mambo f000f bits:
- Set POWER10 to DD2.0
Update SIM_CTRL and SIM_CTRL1 bits:
- Set the LPAR-per-core mode bit. This is required for SMT KVM to work.
- Set ARC0/ARC1 bits which enable atomic RC update interrupts (not
hardware updates), which matches implementation.
- Enable DEXCR, HAIL, ROP, BHRB disable, block BHRB writes in PR=0,
and RFC02628 on POWER10.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'hw/xscom.c')
-rw-r--r-- | hw/xscom.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -826,7 +826,7 @@ int64_t xscom_read_cfam_chipid(uint32_t partid, uint32_t *chip_id) */ if (chip_quirk(QUIRK_NO_F000F)) { if (proc_gen == proc_gen_p10) - val = 0x120DA04980000000UL; /* P10 DD1.0 */ + val = 0x220DA04980000000UL; /* P10 DD2.0 */ else if (proc_gen == proc_gen_p9) val = 0x203D104980000000UL; /* P9 Nimbus DD2.3 */ else |