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| author | Oliver O'Halloran <oohall@gmail.com> | 2020-04-02 22:13:54 +1100 |
|---|---|---|
| committer | Oliver O'Halloran <oohall@gmail.com> | 2020-04-08 14:38:33 +1000 |
| commit | 9b612fff557f67f001b4772c180a50a9cb92e6bb (patch) | |
| tree | 096c013c91df2cda3cd0a10db8f142fb3b63a3f2 /hw/xscom.c | |
| parent | 7b57002d3f5fd45caeb53240bf401803c528b865 (diff) | |
| download | skiboot-9b612fff557f67f001b4772c180a50a9cb92e6bb.zip skiboot-9b612fff557f67f001b4772c180a50a9cb92e6bb.tar.gz skiboot-9b612fff557f67f001b4772c180a50a9cb92e6bb.tar.bz2 | |
hw/centaur: Convert to use the new scom API
Currently we assume any xscom_read / write targeted at a chipid with 0x8
as the top four bits is intended to be a centaur SCOM. On non-P8
platforms there is no reason to assume this so covert it to use the
new struct scom_controller infrastructure.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw/xscom.c')
| -rw-r--r-- | hw/xscom.c | 4 |
1 files changed, 0 insertions, 4 deletions
@@ -667,8 +667,6 @@ int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, bool take_loc case 0: /* Normal processor chip */ gcid = partid; break; - case 8: /* Centaur */ - return centaur_xscom_read(partid, pcb_addr, val); case 4: /* EX chiplet */ gcid = xscom_decode_chiplet(partid, &pcb_addr); if (pcb_addr == 0) @@ -730,8 +728,6 @@ int _xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val, bool take_loc case 0: /* Normal processor chip */ gcid = partid; break; - case 8: /* Centaur */ - return centaur_xscom_write(partid, pcb_addr, val); case 4: /* EX chiplet */ gcid = xscom_decode_chiplet(partid, &pcb_addr); break; |