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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-04-09 08:10:30 +1000 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-04-09 14:38:12 +1000 |
commit | 2f9eccfe836ed918202447c493d63486d29dba9c (patch) | |
tree | 3841bf901b48c3ada3a51a9e399638d7e631ea7e /hw/xscom.c | |
parent | 4a574d2bbf3779a409fac9c46d4ab44b40a1803d (diff) | |
download | skiboot-2f9eccfe836ed918202447c493d63486d29dba9c.zip skiboot-2f9eccfe836ed918202447c493d63486d29dba9c.tar.gz skiboot-2f9eccfe836ed918202447c493d63486d29dba9c.tar.bz2 |
Add Naples chip support
This adds the PVR and CFAM ID for the Naples chip. Otherwise treated as
a Venice.
This doesn't add the definitions for the new PHB revision yet
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/xscom.c')
-rw-r--r-- | hw/xscom.c | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -480,6 +480,10 @@ static void xscom_init_chip_info(struct proc_chip *chip) chip->type = PROC_CHIP_P8_VENICE; assert(proc_gen == proc_gen_p8); break; + case 0xd3: + chip->type = PROC_CHIP_P8_NAPLES; + assert(proc_gen == proc_gen_p8); + break; default: printf("CHIP: Unknown chip type 0x%02x !!!\n", (unsigned char)(val & 0xff)); |