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authorOliver O'Halloran <oohall@gmail.com>2019-09-05 20:50:41 +1000
committerOliver O'Halloran <oohall@gmail.com>2019-09-06 16:59:59 +1000
commitfa161cd89fbf6f543f302651a0fd447b8dfc8b06 (patch)
tree533fe230300e57761a7210a251ddd4d357519505 /hw/xive.c
parentfb2f03ea913793caa5f82e1181d1efd5c159ca91 (diff)
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hw/psi-p9: Mask OPAL-owned LSIs without handlers
Some versions of Swift have the TPM interrupt line of the second chip pulled up instead of down. This causes the PSI's external (TPM) interrupt to constantly re-fire since it's an LSI and the interrupt signal is constantly active. There's nothing that can be done to clear the underlying interrupt condition so we to ensure that it's masked. The problem isn't really specific to the external interrupt and will occur for any of the PSI interrupts that don't have an actual handler (FSP, global error, and sometimes the external). When one of these is delivered to OPAL we should log that it happened and mask it to prevent re-firing. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw/xive.c')
-rw-r--r--hw/xive.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/xive.c b/hw/xive.c
index 5dc6659..96a9bc6 100644
--- a/hw/xive.c
+++ b/hw/xive.c
@@ -2732,6 +2732,13 @@ static char *xive_source_name(struct irq_source *is, uint32_t isn)
return s->orig_ops->name(is, isn);
}
+void xive_source_mask(struct irq_source *is, uint32_t isn)
+{
+ struct xive_src *s = container_of(is, struct xive_src, is);
+
+ xive_update_irq_mask(s, isn - s->esb_base, true);
+}
+
static const struct irq_source_ops xive_irq_source_ops = {
.get_xive = xive_source_get_xive,
.set_xive = xive_source_set_xive,