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authorRyan Grimm <grimm@linux.vnet.ibm.com>2020-08-04 23:02:13 +0530
committerOliver O'Halloran <oohall@gmail.com>2020-08-07 16:00:20 +1000
commit2d065e249f78e11ddeca0c84920b28a7ca4f8ee1 (patch)
tree0dcbaee1a6b13760e63b911cb58e61061d47e440 /hw/xive.c
parent043725d49d3b2c0b6ea3c37395aa5d6e38d5e73a (diff)
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Add basic P9 fused core support
P9 cores can be configured into fused core mode where two core chiplets function as an 8-threaded, single core. So, bump four to eight in boot_entry when in fused core mode and cpu_thread_count in init_boot_cpu. The HID, AMOR, TSCR, RPR require the first active thread on that core chiplet to load the copy for that core chiplet. So, send thread 1 of a fused core to init_shared_sprs in boot_entry. The code checks for fused core mode in the core thead state register and puts a field in struct cpu_thread. This flag is checked when updating the HID and in XIVE code when setting the special bar. For XSCOM, the core ID is the non-fused EX. So, create macros to arrange the bits. It's fairly verbose but somewhat readable. This was tested on a P9 ZZ with 16 fused cores and ran HTX for over 24 hours. Signed-off-by: Ryan Grimm <grimm@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw/xive.c')
-rw-r--r--hw/xive.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/xive.c b/hw/xive.c
index f8837ae..cf2cede 100644
--- a/hw/xive.c
+++ b/hw/xive.c
@@ -3089,7 +3089,7 @@ static void xive_init_cpu(struct cpu_thread *c)
* of a pair is present we just do the setup for each of them, which
* is harmless.
*/
- if (cpu_is_thread0(c))
+ if (cpu_is_thread0(c) || cpu_is_core_chiplet_primary(c))
xive_configure_ex_special_bar(x, c);
/* Initialize the state structure */