xive/p9: Clarify the escalation IRQ encoding

When an interrupt can not be delivered, an escalation interrupt can be
triggered. The EQ descriptor of the pending interrupt should be
configured to generate an escalation event, using the EQ_W0_ESCALATE_CTL
'e' bit, and words 4 and 5 of the EQ descriptor should contain an IVE
pointing to the escalation EQ to trigger. This is why EQ descriptors
are considered as interrupt sources and registered as such when
initializing the interrupt controller.

These interrupts are identified as escalations by the OPAL XIVE
interface, OPAL calls and internal routines, by setting a special bit
in their global interrupt number. Clarify that and check that the
number of EQ descriptors is not overflowing the global interrupt
encoding.

Reviewed-by: Gustavo Romero <gromero@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>

0 files changed, 0 insertions, 0 deletions