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authorVasant Hegde <hegdevasant@linux.vnet.ibm.com>2019-07-12 16:47:54 +0530
committerOliver O'Halloran <oohall@gmail.com>2019-08-15 17:53:56 +1000
commitaa694ea08c0d6350455400e69d266f1dada062c1 (patch)
treea534a1ddf411b6a1c5b00f72f23431965ffacbbb /hw/sbe-p9.c
parentfbd875d77f30ee9a713625c3f4400cde06e70ac8 (diff)
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HIOMAP: Reset bmc mbox in MPIPL path
During boot SBE and early hostboot does not use HIOMAP protocol to get image from PNOR. Instead it expects PNOR TOC and Hostboot Boot Loader to be available at particular address in LPC bus. mbox daemon in BMC side takes care of this during normal boot. Once boot is complete mbox daemon switches to normal mode. During normal reboot, BMC side mbox daemon gets notification and takes care of loading PNOR TOC and HBBL to LPC bus again. In MPIPL path, OPAL calls SBE S0 interrupt to initiate MPIPL. BMC will not be aware of this. But SBE expects PNOR TOC and HBBL to be available in LPC bus at predefined address. Hence call HIOMAP Reset from OPAL in assert path. This needs working LPC and IPMI driver in OPAL. If we have issue in these drivers then we may not be able to reset BMC MBOX properly. Hence MPIPL may fail. We have to live with this until we find a way to intiate BMC on MPIPL. CC: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> [oliver: rebased] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw/sbe-p9.c')
-rw-r--r--hw/sbe-p9.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/sbe-p9.c b/hw/sbe-p9.c
index 5c63ec1..1b5f29e 100644
--- a/hw/sbe-p9.c
+++ b/hw/sbe-p9.c
@@ -952,6 +952,12 @@ void p9_sbe_terminate(void)
if (!dt_find_by_path(opal_node, "dump"))
return;
+ /* Unregister flash. It will request BMC MBOX reset */
+ if (!flash_unregister()) {
+ prlog(PR_DEBUG, "Failed to reset BMC MBOX\n");
+ return;
+ }
+
/* Save crashing CPU details */
opal_mpipl_save_crashing_pir();