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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-11-14 13:06:02 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-11-15 15:06:00 +1100 |
| commit | d4a953d8efb8a1db900d6b58b5600f228f2e2bc1 (patch) | |
| tree | 9108dbe0ee908725e18f948ce196ea55ae3d6e4e /hw/psi.c | |
| parent | 747771ddfa422d0bcbd21fa39e11430bbbcefdd3 (diff) | |
| download | skiboot-d4a953d8efb8a1db900d6b58b5600f228f2e2bc1.zip skiboot-d4a953d8efb8a1db900d6b58b5600f228f2e2bc1.tar.gz skiboot-d4a953d8efb8a1db900d6b58b5600f228f2e2bc1.tar.bz2 | |
psi: Fix P9 BAR setup on multi-chips
We need to inject the chip id in the MMIO address
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/psi.c')
| -rw-r--r-- | hw/psi.c | 6 |
1 files changed, 4 insertions, 2 deletions
@@ -764,8 +764,9 @@ static void psi_init_p9_interrupts(struct psi *psi) /* Configure the CI BAR if necessary */ val = in_be64(psi->regs + PSIHB_ESB_CI_BASE); if (!(val & PSIHB_ESB_CI_VALID)) { - out_be64(psi->regs + PSIHB_ESB_CI_BASE, - PSIHB_ESB_MMIO_DEFAULT | PSIHB_ESB_CI_VALID); + val = PSIHB_ESB_MMIO_DEFAULT | PSIHB_ESB_CI_VALID; + val |= (0x40000000000ull * (uint64_t)psi->chip_id); + out_be64(psi->regs + PSIHB_ESB_CI_BASE, val); printf("PSI[0x%03x]: ESB MMIO invalid, reconfiguring...\n", psi->chip_id); } @@ -973,6 +974,7 @@ static struct psi *psi_probe_p9(struct proc_chip *chip, u64 base) chip->id, val); #define PSIHB_PSI_MMIO_DEFAULT 0x006030203000000ull val = PSIHB_PSI_MMIO_DEFAULT | PSIHB_XSCOM_P9_HBBAR_EN; + val |= (0x40000000000ull * (uint64_t)chip->id); xscom_write(chip->id, base + PSIHB_XSCOM_P9_BASE, val); } psi = alloc_psi(chip, base); |