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authorMichael Neuling <mikey@neuling.org>2017-06-15 15:12:40 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-06-19 14:49:29 +1000
commit805373b35234f6c0acec86c9c354e37a56cb105e (patch)
tree1f0aeed164a9f39891ec6f91e77dc7df4b3c546a /hw/psi.c
parent1826b103c4d8976bdc9ddd9c44c5d57f7e1ee967 (diff)
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Ensure P9 DD1 workarounds apply only to Nimbus
The workarounds for P9 DD1 are only needed for Nimbus. P9 Cumulus will be DD1 but don't need these same workarounds. This patch ensures the P9 DD1 workarounds only apply to Nimbus. It also renames some things to make clear what's what. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/psi.c')
-rw-r--r--hw/psi.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/hw/psi.c b/hw/psi.c
index ccc3578..571714a 100644
--- a/hw/psi.c
+++ b/hw/psi.c
@@ -663,7 +663,7 @@ static char *psi_p9_irq_name(struct irq_source *is, uint32_t isn)
return strdup(names[idx]);
}
-static void psi_p9_irq_dd1_eoi(struct irq_source *is, uint32_t isn)
+static void psi_p9_irq_ndd1_eoi(struct irq_source *is, uint32_t isn)
{
struct psi *psi = is->data;
unsigned int idx = isn & 0xf;
@@ -674,11 +674,11 @@ static void psi_p9_irq_dd1_eoi(struct irq_source *is, uint32_t isn)
__xive_source_eoi(is, isn);
}
-static const struct irq_source_ops psi_p9_dd1_irq_ops = {
+static const struct irq_source_ops psi_p9_ndd1_irq_ops = {
.interrupt = psihb_p9_interrupt,
.attributes = psi_p9_irq_attributes,
.name = psi_p9_irq_name,
- .eoi = psi_p9_irq_dd1_eoi,
+ .eoi = psi_p9_irq_ndd1_eoi,
};
static const struct irq_source_ops psi_p9_irq_ops = {
@@ -822,7 +822,7 @@ static void psi_init_p8_interrupts(struct psi *psi)
static void psi_init_p9_interrupts(struct psi *psi)
{
struct proc_chip *c;
- bool is_dd2;
+ bool is_p9ndd1;
u64 val;
/* Reset irq handling and switch to ESB mode */
@@ -856,22 +856,23 @@ static void psi_init_p9_interrupts(struct psi *psi)
/* Register sources */
c = next_chip(NULL);
- is_dd2 = (c && c->ec_level >= 0x20);
+ is_p9ndd1 = (c && c->ec_level >= 0x10 &&
+ c->type == PROC_CHIP_P9_NIMBUS);
- if (is_dd2) {
+ if (is_p9ndd1) {
prlog(PR_DEBUG,
- "PSI[0x%03x]: Interrupts sources registered for P9 DD2.x\n",
+ "PSI[0x%03x]: Interrupts sources registered for P9N DD1.x\n",
psi->chip_id);
xive_register_hw_source(psi->interrupt, P9_PSI_NUM_IRQS,
12, psi->esb_mmio, XIVE_SRC_LSI,
- psi, &psi_p9_irq_ops);
+ psi, &psi_p9_ndd1_irq_ops);
} else {
prlog(PR_DEBUG,
- "PSI[0x%03x]: Interrupts sources registered for P9 DD1.x\n",
+ "PSI[0x%03x]: Interrupts sources registered for P9 DD2.x\n",
psi->chip_id);
xive_register_hw_source(psi->interrupt, P9_PSI_NUM_IRQS,
12, psi->esb_mmio, XIVE_SRC_LSI,
- psi, &psi_p9_dd1_irq_ops);
+ psi, &psi_p9_irq_ops);
}
}