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author | LuluTHSu <Lulu_Su@wistron.com> | 2020-10-30 10:22:29 +0800 |
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committer | Oliver O'Halloran <oohall@gmail.com> | 2020-11-02 12:37:01 +1100 |
commit | 5262cdd1b99f77bca5951fc8132f9795ef0c2b87 (patch) | |
tree | 440a2ae6803e3b5cf22d0b62616e31927f8c3fd3 /hw/phb4.c | |
parent | 233ade2f6ffdfa406100276784eb447d062fe8e7 (diff) | |
download | skiboot-5262cdd1b99f77bca5951fc8132f9795ef0c2b87.zip skiboot-5262cdd1b99f77bca5951fc8132f9795ef0c2b87.tar.gz skiboot-5262cdd1b99f77bca5951fc8132f9795ef0c2b87.tar.bz2 |
mowgli: Limit slot1 to Gen3 by default
Refer to the spec. of mowgli, limit the slot to Gen3 speed.
For mowgli platform spec.
Cc: skiboot-stable@lists.ozlabs.org
Signed-off-by: LuluTHSu <Lulu_Su@wistron.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Diffstat (limited to 'hw/phb4.c')
-rw-r--r-- | hw/phb4.c | 21 |
1 files changed, 21 insertions, 0 deletions
@@ -2991,6 +2991,27 @@ static unsigned int phb4_get_max_link_speed(struct phb4 *p, struct dt_node *np) return max_link_speed; } +/* + * Has the same effect as the ibm,max-link-speed property. + * i.e. sets the default link speed, while allowing NVRAM + * overrides, etc to still take effect. + */ +void phb4_set_dt_max_link_speed(struct phb4 *p, int new_max) +{ + uint64_t scr; + int max; + + /* take into account nvram settings, etc */ + if (pcie_max_link_speed) + max = pcie_max_link_speed; + else + max = new_max; + + scr = phb4_read_reg(p, PHB_PCIE_SCR); + scr = SETFIELD(PHB_PCIE_SCR_MAXLINKSPEED, scr, max); + phb4_write_reg(p, PHB_PCIE_SCR, scr); +} + static void phb4_assert_perst(struct pci_slot *slot, bool assert) { struct phb4 *p = phb_to_phb4(slot->phb); |