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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2018-08-15 15:10:35 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2018-09-13 15:19:36 +1000
commit9a83ab711ea3c76919f311cb1c78e051ae59c808 (patch)
tree371d0ba0b4980d6ffce013b647d87074ccf953f4 /hw/phb4.c
parent0a087154ca4f6759ad1e25c0b3933a9e6caeb456 (diff)
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phb4: Workaround PHB errata with CFG write UR/CA errors
If the PHB encounters a UR or CA status on a CFG write, it will incorrectly freeze the wrong PE. Instead of using the PE# specified in the CONFIG_ADDRESS register, it will use the PE# of whatever MMIO occurred last. Work around this disabling freeze on such errors Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-By: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/phb4.c')
-rw-r--r--hw/phb4.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/phb4.c b/hw/phb4.c
index fbf54b5..214df79 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -4713,7 +4713,11 @@ static void phb4_init_errors(struct phb4 *p)
out_be64(p->regs + 0x0d00, 0xffffffffffffffffull);
out_be64(p->regs + 0x0d08, 0x0000000000000000ull);
out_be64(p->regs + 0x0d18, 0xffffff0fffffffffull);
- out_be64(p->regs + 0x0d28, 0x0000400a00000000ull);
+
+ /* Errata: Clear bit 17, otherwise a CFG write UR/CA will incorrectly
+ * freeze a "random" PE (whatever last PE did an MMIO)
+ */
+ out_be64(p->regs + 0x0d28, 0x0000000a00000000ull);
out_be64(p->regs + 0x0d30, 0xdff7bd05f7ddfff0ull); /* XXX CAPI has diff. value */
out_be64(p->regs + 0x0d40, 0x0000000000000000ull);
out_be64(p->regs + 0x0d48, 0x0000000000000000ull);