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| author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2017-06-13 14:21:21 +0200 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-06-19 14:49:29 +1000 |
| commit | e50764d4f2b11fc9e9fe0b2fd0a4617b32593bfa (patch) | |
| tree | f4e524e82083ea0693312b768a966b1115ecabe1 /hw/phb4.c | |
| parent | 37ea3cfdc8523cb5fbbde6e364eaed3c1c67f8bb (diff) | |
| download | skiboot-e50764d4f2b11fc9e9fe0b2fd0a4617b32593bfa.zip skiboot-e50764d4f2b11fc9e9fe0b2fd0a4617b32593bfa.tar.gz skiboot-e50764d4f2b11fc9e9fe0b2fd0a4617b32593bfa.tar.bz2 | |
capi: Load capp microcode
CAPP microcode flash download and CAPP upload for PHB4.
A new file 'capp.c' is created to receive common capp code for PHB3 and
PHB4.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/phb4.c')
| -rw-r--r-- | hw/phb4.c | 26 |
1 files changed, 25 insertions, 1 deletions
@@ -48,6 +48,7 @@ #include <phb4.h> #include <phb4-regs.h> #include <phb4-capp.h> +#include <capp.h> #include <fsp.h> #include <chip.h> #include <chiptod.h> @@ -2105,7 +2106,22 @@ static int64_t phb4_freset(struct pci_slot *slot) return OPAL_HARDWARE; } -extern struct lock capi_lock; +static int64_t load_capp_ucode(struct phb4 *p) +{ + int64_t rc; + + if (p->index != CAPP0_PHB_INDEX && p->index != CAPP1_PHB_INDEX) + return OPAL_HARDWARE; + + /* 0x4341505050534C4C = 'CAPPPSLL' in ASCII */ + rc = capp_load_ucode(p->chip_id, p->phb.opal_id, p->index, + 0x4341505050534C4C, PHB4_CAPP_REG_OFFSET(p), + CAPP_APC_MASTER_ARRAY_ADDR_REG, + CAPP_APC_MASTER_ARRAY_WRITE_REG, + CAPP_SNP_ARRAY_ADDR_REG, + CAPP_SNP_ARRAY_WRITE_REG); + return rc; +} static int64_t phb4_creset(struct pci_slot *slot) { @@ -3027,6 +3043,11 @@ static int64_t phb4_set_capi_mode(struct phb *phb, uint64_t mode, uint32_t offset; + if (!capp_ucode_loaded(chip, p->index)) { + PHBERR(p, "CAPP: ucode not loaded\n"); + return OPAL_RESOURCE; + } + lock(&capi_lock); chip->capp_phb4_attached_mask |= 1 << p->index; unlock(&capi_lock); @@ -3960,6 +3981,9 @@ static void phb4_create(struct dt_node *np) /* Get the HW up and running */ phb4_init_hw(p, true); + /* Load capp microcode into capp unit */ + load_capp_ucode(p); + /* Register all interrupt sources with XIVE */ xive_register_hw_source(p->base_msi, p->num_irqs - 8, 16, p->int_mmio, |