diff options
| author | Michael Neuling <mikey@neuling.org> | 2017-12-07 09:56:38 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-12-11 19:30:46 -0600 |
| commit | 5cee066746d238feef51dd7b0359c3456b089748 (patch) | |
| tree | 9643eb2a55b6ee7add994ea31c1d5b87fe10afc6 /hw/phb4.c | |
| parent | b504f2737e9ba3b6935b4ea1c015b3643aefaf51 (diff) | |
| download | skiboot-5cee066746d238feef51dd7b0359c3456b089748.zip skiboot-5cee066746d238feef51dd7b0359c3456b089748.tar.gz skiboot-5cee066746d238feef51dd7b0359c3456b089748.tar.bz2 | |
phb4: Change PCI MMIO timers
Currently we have a mismatch between the NCU and PCI timers for MMIO
accesses. The PCI timers must be lower than the NCU timers otherwise
it may cause checkstops.
This changes PCI timeouts controlled by skiboot to 33-50ms. It should
be forwards and backwards compatible with expected hostboot changes to
the NCU timer.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/phb4.c')
| -rw-r--r-- | hw/phb4.c | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -4509,13 +4509,13 @@ static void phb4_init_hw(struct phb4 *p, bool first_init) out_be64(p->regs + PHB_TCE_SPEC_CTL, 0x0000000000000000ull); /* Init_133 - Timeout Control Register 1 */ - out_be64(p->regs + PHB_TIMEOUT_CTRL1, 0x0018150000160000ull); + out_be64(p->regs + PHB_TIMEOUT_CTRL1, 0x0015150000150000ull); /* Init_134 - Timeout Control Register 2 */ out_be64(p->regs + PHB_TIMEOUT_CTRL2, 0x0000181700000000ull); /* Init_135 - PBL Timeout Control Register */ - out_be64(p->regs + PHB_PBL_TIMEOUT_CTRL, 0x2015000000000000ull); + out_be64(p->regs + PHB_PBL_TIMEOUT_CTRL, 0x2013000000000000ull); /* Mark the PHB as functional which enables all the various sequences */ p->state = PHB4_STATE_FUNCTIONAL; |