diff options
| author | Michael Neuling <mikey@neuling.org> | 2017-03-28 17:14:56 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-03-29 17:26:33 +1100 |
| commit | 6b464ef731a89664519cfa8986425246dc7766fb (patch) | |
| tree | d3259c86be6993aa0abac151bc2b653daacbaa98 /hw/phb3.c | |
| parent | 7a7a1ba30dd1153d623ea021eadec4f561f507d9 (diff) | |
| download | skiboot-6b464ef731a89664519cfa8986425246dc7766fb.zip skiboot-6b464ef731a89664519cfa8986425246dc7766fb.tar.gz skiboot-6b464ef731a89664519cfa8986425246dc7766fb.tar.bz2 | |
phb3/4: Set max link speed via nvram
This adds an nvram parameter pcie-max-link-speed to configure the max
speed of the pcie link. This can be set from the petitboot prompt
using:
nvram -p ibm,skiboot --update-config pcie-max-link-speed=4
This takes preference over anything set in the device tree and is
global to all PHBs.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/phb3.c')
| -rw-r--r-- | hw/phb3.c | 17 |
1 files changed, 14 insertions, 3 deletions
@@ -4671,7 +4671,6 @@ static void phb3_create(struct dt_node *np) p->phb.ops = &phb3_ops; p->phb.phb_type = phb_type_pcie_v3; p->phb.scan_map = 0x1; /* Only device 0 to scan */ - p->max_link_speed = dt_prop_get_u32_def(np, "ibm,max-link-speed", 3); p->state = PHB3_STATE_UNINITIALIZED; if (!phb3_calculate_windows(p)) @@ -4737,6 +4736,16 @@ static void phb3_create(struct dt_node *np) if (!p->phb.base_loc_code) PHBERR(p, "Base location code not found !\n"); + /* Priority order: NVRAM -> dt -> GEN3 */ + p->max_link_speed = 3; + if (dt_has_node_property(np, "ibm,max-link-speed", NULL)) + p->max_link_speed = dt_prop_get_u32(np, "ibm,max-link-speed"); + if (pcie_max_link_speed) + p->max_link_speed = pcie_max_link_speed; + if (p->max_link_speed > 3) /* clamp to 3 */ + p->max_link_speed = 3; + PHBINF(p, "Max link speed: GEN%i\n", p->max_link_speed); + /* Check for lane equalization values from HB or HDAT */ p->lane_eq = dt_prop_get_def_size(np, "ibm,lane-eq", NULL, &lane_eq_len); if (p->lane_eq && lane_eq_len != (8 * 4)) { @@ -4966,8 +4975,10 @@ static void phb3_probe_pbcq(struct dt_node *pbcq) capp_ucode_base = dt_prop_get_u32(pbcq, "ibm,capp-ucode"); dt_add_property_cells(np, "ibm,capp-ucode", capp_ucode_base); } - max_link_speed = dt_prop_get_u32_def(pbcq, "ibm,max-link-speed", 3); - dt_add_property_cells(np, "ibm,max-link-speed", max_link_speed); + if (dt_has_node_property(pbcq, "ibm,max-link-speed", NULL)) { + max_link_speed = dt_prop_get_u32(pbcq, "ibm,max-link-speed"); + dt_add_property_cells(np, "ibm,max-link-speed", max_link_speed); + } dt_add_property_cells(np, "ibm,capi-flags", OPAL_PHB_CAPI_FLAG_SNOOP_CONTROL); |