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| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2014-07-21 14:35:27 +1000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-07-21 14:48:45 +1000 |
| commit | a4202bc19821a024e460592159507a059f993d3b (patch) | |
| tree | 9385e51a6fe4e3ef4b5bf905e2a0188b91935aa6 /hw/phb3.c | |
| parent | 1b5220b4b7a337463cfe77e36d8988039f6facca (diff) | |
| download | skiboot-a4202bc19821a024e460592159507a059f993d3b.zip skiboot-a4202bc19821a024e460592159507a059f993d3b.tar.gz skiboot-a4202bc19821a024e460592159507a059f993d3b.tar.bz2 | |
PCI: Allow to set frozen state
The patch introduces a new OPAL API opal_pci_eeh_freeze_set(),
which allows to set frozen state for the specified PE, so that
we can support "compound" PE in kernel.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'hw/phb3.c')
| -rw-r--r-- | hw/phb3.c | 35 |
1 files changed, 35 insertions, 0 deletions
@@ -2431,6 +2431,40 @@ static int64_t phb3_eeh_freeze_clear(struct phb *phb, uint64_t pe_number, return OPAL_SUCCESS; } +static int64_t phb3_eeh_freeze_set(struct phb *phb, uint64_t pe_number, + uint64_t eeh_action_token) +{ + struct phb3 *p = phb_to_phb3(phb); + uint64_t data; + + if (p->state == PHB3_STATE_BROKEN) + return OPAL_HARDWARE; + + if (pe_number >= PHB3_MAX_PE_NUM) + return OPAL_PARAMETER; + + if (eeh_action_token != OPAL_EEH_ACTION_SET_FREEZE_MMIO && + eeh_action_token != OPAL_EEH_ACTION_SET_FREEZE_DMA && + eeh_action_token != OPAL_EEH_ACTION_SET_FREEZE_ALL) + return OPAL_PARAMETER; + + if (eeh_action_token & OPAL_EEH_ACTION_SET_FREEZE_MMIO) { + phb3_ioda_sel(p, IODA2_TBL_PESTA, pe_number, false); + data = in_be64(p->regs + PHB_IODA_DATA0); + data |= IODA2_PESTA_MMIO_FROZEN; + out_be64(p->regs + PHB_IODA_DATA0, data); + } + + if (eeh_action_token & OPAL_EEH_ACTION_SET_FREEZE_DMA) { + phb3_ioda_sel(p, IODA2_TBL_PESTB, pe_number, false); + data = in_be64(p->regs + PHB_IODA_DATA0); + data |= IODA2_PESTB_DMA_STOPPED; + out_be64(p->regs + PHB_IODA_DATA0, data); + } + + return OPAL_SUCCESS; +} + static int64_t phb3_eeh_next_error(struct phb *phb, uint64_t *first_frozen_pe, uint16_t *pci_error_type, @@ -3009,6 +3043,7 @@ static const struct phb_ops phb3_ops = { .poll = phb3_poll, .eeh_freeze_status = phb3_eeh_freeze_status, .eeh_freeze_clear = phb3_eeh_freeze_clear, + .eeh_freeze_set = phb3_eeh_freeze_set, .next_error = phb3_eeh_next_error, .err_injct = phb3_err_injct, .get_diag_data = NULL, |