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| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2014-08-05 11:56:26 +1000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-08-08 16:07:26 +1000 |
| commit | 82b53f9d1d22a184f5929e95032bab5ea4c0e6a8 (patch) | |
| tree | efac45c2cc7743d29b66d35e8ccfc4dd811f8433 /hw/phb3.c | |
| parent | 227f0393d91b2156e62cfbeba7e6dc032494886c (diff) | |
| download | skiboot-82b53f9d1d22a184f5929e95032bab5ea4c0e6a8.zip skiboot-82b53f9d1d22a184f5929e95032bab5ea4c0e6a8.tar.gz skiboot-82b53f9d1d22a184f5929e95032bab5ea4c0e6a8.tar.bz2 | |
PCI: Restore bus numbers after complete reset
The complete reset could be issued by kdump kernel to remove pending
PCI traffic in order to avoid EEH errors in kdump scenario. However,
the bus numbers configured into PCI bridges would be lost after the
reset and it would cause that some of PCI devices (e.g. IPR) can't
be probed by kdump kernel successfully.
The patch fixes above issue by restoring bus numbers after complete
reset. It's responsing to bug#113210
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'hw/phb3.c')
| -rw-r--r-- | hw/phb3.c | 12 |
1 files changed, 12 insertions, 0 deletions
@@ -1929,6 +1929,15 @@ static void phb3_setup_for_link_up(struct phb3 *p) /* Don't block PCI-CFG */ p->flags &= ~PHB3_CFG_BLOCKED; + + /* + * For complete reset, we might be required to restore + * bus numbers for PCI bridges. + */ + if (p->flags & PHB3_RESTORE_BUS_NUM) { + p->flags &= ~PHB3_RESTORE_BUS_NUM; + pci_restore_bridge_buses(&p->phb); + } } static int64_t phb3_sm_link_poll(struct phb3 *p) @@ -2251,6 +2260,9 @@ static int64_t phb3_complete_reset(struct phb *phb, uint8_t assert) PHBINF(p, "Starting PHB reset sequence\n"); return phb3_sm_complete_reset(p); } else { + /* Restore bus numbers for bridges */ + p->flags |= PHB3_RESTORE_BUS_NUM; + return phb3_sm_hot_reset(p); } } |