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author | Jeremy Kerr <jk@ozlabs.org> | 2015-02-27 17:35:03 +0800 |
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committer | Jeremy Kerr <jk@ozlabs.org> | 2015-03-04 16:02:20 +0800 |
commit | 0f2343075276a6bcc15c679b4270d0843e002da0 (patch) | |
tree | 9f912da47ff262013a823e7d83d9829cd012f868 /hw/occ.c | |
parent | d6fb45e3b29df30e30ac400cfb8b030719207213 (diff) | |
download | skiboot-0f2343075276a6bcc15c679b4270d0843e002da0.zip skiboot-0f2343075276a6bcc15c679b4270d0843e002da0.tar.gz skiboot-0f2343075276a6bcc15c679b4270d0843e002da0.tar.bz2 |
occ: Inform OCC of BMC PNOR ownership requests
We need to pass the PNOR access status to the OCCs, as they may write to
the PNOR in the event of a checkstop.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Diffstat (limited to 'hw/occ.c')
-rw-r--r-- | hw/occ.c | 28 |
1 files changed, 28 insertions, 0 deletions
@@ -537,6 +537,34 @@ static void occ_do_reset(u8 scope, u32 dbob_id, u32 seq_id) } } +#define PV_OCC_GP0 0x01000000 +#define PV_OCC_GP0_AND 0x01000004 +#define PV_OCC_GP0_OR 0x01000005 +#define PV_OCC_GP0_PNOR_OWNER PPC_BIT(18) /* 1 = OCC / Host, 0 = BMC */ + +static void occ_pnor_set_one_owner(uint32_t chip_id, enum pnor_owner owner) +{ + uint64_t reg, mask; + + if (owner == PNOR_OWNER_HOST) { + reg = PV_OCC_GP0_OR; + mask = PV_OCC_GP0_PNOR_OWNER; + } else { + reg = PV_OCC_GP0_AND; + mask = ~PV_OCC_GP0_PNOR_OWNER; + } + + xscom_write(chip_id, reg, mask); +} + +void occ_pnor_set_owner(enum pnor_owner owner) +{ + struct proc_chip *chip; + + for_each_chip(chip) + occ_pnor_set_one_owner(chip->id, owner); +} + static bool fsp_occ_msg(u32 cmd_sub_mod, struct fsp_msg *msg) { u32 dbob_id, seq_id; |