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| author | Benjamin Herrenschmidt <benh@au1.ibm.com> | 2015-09-10 10:09:26 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-09-11 16:42:17 +1000 |
| commit | 9af5751a00faf9ad3fe4b52f56de9bd7835d9bb7 (patch) | |
| tree | 5be21b54d2b9d301b9983cf18554c1386cdce00d /hw/occ.c | |
| parent | b5f05ac337b3495cf506f5492fd053e90ae0bda3 (diff) | |
| download | skiboot-9af5751a00faf9ad3fe4b52f56de9bd7835d9bb7.zip skiboot-9af5751a00faf9ad3fe4b52f56de9bd7835d9bb7.tar.gz skiboot-9af5751a00faf9ad3fe4b52f56de9bd7835d9bb7.tar.bz2 | |
slw/timer: SBE based timer support
Recent HostBoot & SBE firmware provide a HW timer facility that can
be used to implement OPAL timers and thus limit the reliance on the
Linux heartbeat.
This implements support for it. The side effect is that i2c from Centaurs
is now usable.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: fix run-timer unit test]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/occ.c')
| -rw-r--r-- | hw/occ.c | 7 |
1 files changed, 6 insertions, 1 deletions
@@ -26,6 +26,7 @@ #include <errorlog.h> #include <opal-api.h> #include <opal-msg.h> +#include <timer.h> /* OCC Communication Area for PStates */ @@ -715,9 +716,11 @@ static struct fsp_client fsp_occ_client = { #define OCB_OCI_OCCMISC_OR 0x6a022 #define OCB_OCI_OCIMISC_IRQ PPC_BIT(0) #define OCB_OCI_OCIMISC_IRQ_TMGT PPC_BIT(1) +#define OCB_OCI_OCIMISC_IRQ_SLW_TMR PPC_BIT(14) #define OCB_OCI_OCIMISC_IRQ_OPAL_DUMMY PPC_BIT(15) #define OCB_OCI_OCIMISC_MASK (OCB_OCI_OCIMISC_IRQ_TMGT | \ - OCB_OCI_OCIMISC_IRQ_OPAL_DUMMY ) + OCB_OCI_OCIMISC_IRQ_OPAL_DUMMY | \ + OCB_OCI_OCIMISC_IRQ_SLW_TMR) void occ_send_dummy_interrupt(void) { @@ -765,6 +768,8 @@ void occ_interrupt(uint32_t chip_id) /* Dispatch */ if (ireg & OCB_OCI_OCIMISC_IRQ_TMGT) prd_tmgt_interrupt(chip_id); + if (ireg & OCB_OCI_OCIMISC_IRQ_SLW_TMR) + check_timers(true); /* We may have masked-out OCB_OCI_OCIMISC_IRQ in the previous * OCCMISC_AND write. Check if there are any new source bits set, |