aboutsummaryrefslogtreecommitdiff
path: root/hw/occ.c
diff options
context:
space:
mode:
authorStewart Smith <stewart@linux.vnet.ibm.com>2015-11-10 17:14:04 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2015-11-10 17:14:04 +1100
commit8dfdef7aef29fee1e0e48e6dbdec68371ac59b1f (patch)
tree9690424131776e51c30e96ff2def02ba7cfebf70 /hw/occ.c
parent0e63e6849ec5fa50a108441382e963b31d1cbc58 (diff)
downloadskiboot-8dfdef7aef29fee1e0e48e6dbdec68371ac59b1f.zip
skiboot-8dfdef7aef29fee1e0e48e6dbdec68371ac59b1f.tar.gz
skiboot-8dfdef7aef29fee1e0e48e6dbdec68371ac59b1f.tar.bz2
llvm-scan-build: fix value stored to rc never read in hw/occ.c
hw/occ.c:278:2: warning: Value stored to 'rc' is never read rc = xscom_read(chip->id, XSCOM_ADDR_P8_EX_SLAVE(core, EX_PM_PPMCR), &tmp); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/occ.c:309:2: warning: Value stored to 'rc' is never read rc = xscom_read(chip->id, XSCOM_ADDR_P8_EX_SLAVE(core, EX_PM_PPMSR), &tmp); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/occ.c')
-rw-r--r--hw/occ.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/hw/occ.c b/hw/occ.c
index 9c696db..0f2b037 100644
--- a/hw/occ.c
+++ b/hw/occ.c
@@ -276,6 +276,11 @@ static bool cpu_pstates_prepare_core(struct proc_chip *chip, struct cpu_thread *
/* Set new pstate to core */
rc = xscom_read(chip->id, XSCOM_ADDR_P8_EX_SLAVE(core, EX_PM_PPMCR), &tmp);
+ if (rc) {
+ log_simple_error(&e_info(OPAL_RC_OCC_PSTATE_INIT),
+ "OCC: Failed to read from OCC in pstates init\n");
+ return false;
+ }
tmp = tmp & ~0xFFFF000000000000ULL;
pstate = ((uint64_t) pstate_nom) & 0xFF;
tmp = tmp | (pstate << 56) | (pstate << 48);
@@ -307,6 +312,12 @@ static bool cpu_pstates_prepare_core(struct proc_chip *chip, struct cpu_thread *
/* Just debug */
rc = xscom_read(chip->id, XSCOM_ADDR_P8_EX_SLAVE(core, EX_PM_PPMSR), &tmp);
+ if (rc) {
+ log_simple_error(&e_info(OPAL_RC_OCC_PSTATE_INIT),
+ "OCC: Failed to read back setting from OCC"
+ "in pstates init\n");
+ return false;
+ }
prlog(PR_DEBUG, "OCC: Chip %x Core %x PPMSR %016llx\n",
chip->id, core, tmp);