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authorShilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>2017-12-07 10:52:29 +0530
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-12-14 23:58:26 -0600
commit781b10633945df32fa2292ee8b196c74f8ef2c7c (patch)
treef712cc950095181c690dd34f0a42b5a5c11a0734 /hw/occ.c
parent49999302251b3e3e2fdca2cbcdeb6aab9add7412 (diff)
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opal-prd: occ: Add support for runtime OCC load/start in ZZ
This patch adds support to handle OCC load/start event from FSP/PRD. During IPL we send a success directly to FSP without invoking any HBRT load routines on recieving OCC load mbox message from FSP. At runtime we forward this event to host opal-prd. This patch provides support for invoking OCC load/start HBRT routines like load_pm_complex() and start_pm_complex() from opal-prd. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/occ.c')
-rw-r--r--hw/occ.c62
1 files changed, 52 insertions, 10 deletions
diff --git a/hw/occ.c b/hw/occ.c
index 3507d5f..f3f1231 100644
--- a/hw/occ.c
+++ b/hw/occ.c
@@ -1754,6 +1754,8 @@ void occ_poke_load_queue(void)
}
}
+static u32 last_seq_id;
+static bool in_ipl = true;
static void occ_do_load(u8 scope, u32 dbob_id __unused, u32 seq_id)
{
struct fsp_msg *rsp;
@@ -1786,15 +1788,25 @@ static void occ_do_load(u8 scope, u32 dbob_id __unused, u32 seq_id)
return;
if (proc_gen == proc_gen_p9) {
- rc = -ENOMEM;
- /* OCC is pre-loaded in P9, so send SUCCESS to FSP */
- rsp = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, 0, seq_id);
- if (rsp)
+ if (in_ipl) {
+ /* OCC is pre-loaded in P9, so send SUCCESS to FSP */
+ rsp = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, 0, seq_id);
+ if (!rsp)
+ return;
+
rc = fsp_queue_msg(rsp, fsp_freemsg);
- if (rc) {
- log_simple_error(&e_info(OPAL_RC_OCC_LOAD),
- "OCC: Error %d queueing FSP OCC LOAD STATUS msg", rc);
- fsp_freemsg(rsp);
+ if (rc) {
+ log_simple_error(&e_info(OPAL_RC_OCC_LOAD),
+ "OCC: Error %d queueing OCC LOAD STATUS msg",
+ rc);
+ fsp_freemsg(rsp);
+ }
+ in_ipl = false;
+ } else {
+ struct proc_chip *chip = next_chip(NULL);
+
+ last_seq_id = seq_id;
+ prd_fsp_occ_load_start(chip->id);
}
return;
}
@@ -1843,8 +1855,6 @@ out:
return rc;
}
-static u32 last_seq_id;
-
int fsp_occ_reset_status(u64 chipid, s64 status)
{
struct fsp_msg *stat;
@@ -1881,6 +1891,38 @@ int fsp_occ_reset_status(u64 chipid, s64 status)
return rc;
}
+int fsp_occ_load_start_status(u64 chipid, s64 status)
+{
+ struct fsp_msg *stat;
+ int rc = OPAL_NO_MEM;
+ int status_word = 0;
+
+ if (status) {
+ struct proc_chip *chip = get_chip(chipid);
+
+ if (!chip)
+ return OPAL_PARAMETER;
+
+ status_word = 0xB500 | (chip->pcid & 0xff);
+ log_simple_error(&e_info(OPAL_RC_OCC_LOAD),
+ "OCC: Error %d in load/start OCC %lld\n", rc,
+ chipid);
+ }
+
+ stat = fsp_mkmsg(FSP_CMD_LOAD_OCC_STAT, 2, status_word, last_seq_id);
+ if (!stat)
+ return rc;
+
+ rc = fsp_queue_msg(stat, fsp_freemsg);
+ if (rc) {
+ fsp_freemsg(stat);
+ log_simple_error(&e_info(OPAL_RC_OCC_LOAD),
+ "OCC: Error %d queueing FSP OCC LOAD STATUS msg", rc);
+ }
+
+ return rc;
+}
+
static void occ_do_reset(u8 scope, u32 dbob_id, u32 seq_id)
{
struct fsp_msg *rsp, *stat;