diff options
author | Dan Streetman <ddstreet@ieee.org> | 2015-03-28 02:03:54 -0400 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-03-31 15:42:37 +1100 |
commit | e07767660a8e5f87817968a4bbdaf97331884f53 (patch) | |
tree | eee840043965e4f97b6ab058cb2273f8af86415b /hw/nx-842.c | |
parent | e1385e6e0088ebc13f0bd5b0e96769672ccf6266 (diff) | |
download | skiboot-e07767660a8e5f87817968a4bbdaf97331884f53.zip skiboot-e07767660a8e5f87817968a4bbdaf97331884f53.tar.gz skiboot-e07767660a8e5f87817968a4bbdaf97331884f53.tar.bz2 |
use chip id for NX engine Coproc Instance num
Remove the counters for each NX engine that are used to assign a unique
Coprocessor Instance (CI) to each engine, and instead just use the chip
id for the CI.
Originally I created the counter to avoid the possibility of assigning
a CI that was out of the defined range for each engine's CI, but I did
not check then what the max chip id was. Since MAX_CHIPS is 64, which
is less than all the engine's max CI value, the chip id can be safely
used for the engine CI.
Additionally, add a BUILD_ASSERT in each engine's setup to verify that
MAX_CHIPS is <= the engine's max CI.
While this changes the CI numbers that are visible to the kernel driver,
the CI values can't be relied on by the kernel to be any specific number,
so this has no effect from an API perspective. The kernel will simply
use whatever CI values are provided (technically, the current kernel
driver uses the special "0" CI value to allow the hw to select which
instance to use for each request, and it does nothing with the actual
CI values).
Signed-off-by: Dan Streetman <ddstreet@ieee.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/nx-842.c')
-rw-r--r-- | hw/nx-842.c | 30 |
1 files changed, 10 insertions, 20 deletions
diff --git a/hw/nx-842.c b/hw/nx-842.c index 0c456a9..fe5485f 100644 --- a/hw/nx-842.c +++ b/hw/nx-842.c @@ -15,6 +15,7 @@ */ #include <skiboot.h> +#include <chip.h> #include <xscom.h> #include <io.h> #include <cpu.h> @@ -35,19 +36,12 @@ #define EE_1 (1) /* enable engine 842 1 */ #define EE_0 (1) /* enable engine 842 0 */ -/* counter used to provide unique Coprocessor Instance number */ -static u64 nx_842_ci_counter = 1; - -static int nx_cfg_842(u32 gcid, u64 xcfg, u64 instance) +static int nx_cfg_842(u32 gcid, u64 xcfg) { u64 cfg, ci, ct; int rc; - if (instance > NX_842_CFG_CI_MAX) { - prerror("NX%d: ERROR: 842 CI %u exceeds max %u\n", - gcid, (unsigned int)instance, NX_842_CFG_CI_MAX); - return OPAL_INTERNAL_ERROR; - } + BUILD_ASSERT(MAX_CHIPS <= NX_842_CFG_CI_MAX); rc = xscom_read(gcid, xcfg, &cfg); if (rc) @@ -70,16 +64,14 @@ static int nx_cfg_842(u32 gcid, u64 xcfg, u64 instance) */ ci = GETFIELD(NX_842_CFG_CI, cfg) >> NX_842_CFG_CI_LSHIFT; if (!ci) - prlog(PR_INFO, "NX%d: 842 CI set to %u\n", gcid, - (unsigned int)instance); - else if (ci == instance) + prlog(PR_INFO, "NX%d: 842 CI set to %d\n", gcid, gcid); + else if (ci == gcid) prlog(PR_INFO, "NX%d: 842 CI already set to %u\n", gcid, - (unsigned int)instance); + (unsigned int)ci); else prlog(PR_INFO, "NX%d: 842 CI already set to %u, " - "changing to %u\n", gcid, - (unsigned int)ci, (unsigned int)instance); - ci = instance; + "changing to %d\n", gcid, (unsigned int)ci, gcid); + ci = gcid; cfg = SETFIELD(NX_842_CFG_CI, cfg, ci << NX_842_CFG_CI_LSHIFT); /* Enable all functions */ @@ -163,7 +155,6 @@ void nx_create_842_node(struct dt_node *node) u32 gcid; u32 pb_base; u64 cfg_dma, cfg_842, cfg_ee; - u64 instance; int rc, pnum; gcid = dt_get_chip_id(node); @@ -190,8 +181,7 @@ void nx_create_842_node(struct dt_node *node) if (rc) return; - instance = nx_842_ci_counter++; - rc = nx_cfg_842(gcid, cfg_842, instance); + rc = nx_cfg_842(gcid, cfg_842); if (rc) return; @@ -202,5 +192,5 @@ void nx_create_842_node(struct dt_node *node) prlog(PR_INFO, "NX%d: 842 Coprocessor Enabled\n", gcid); dt_add_property_cells(node, "ibm,842-coprocessor-type", NX_CT_842); - dt_add_property_cells(node, "ibm,842-coprocessor-instance", instance); + dt_add_property_cells(node, "ibm,842-coprocessor-instance", gcid); } |