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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2018-12-05 15:52:22 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2018-12-10 22:21:12 -0600 |
| commit | d8b161f4b361f70a7bb43be47d4a32b8f937287a (patch) | |
| tree | c3f203691cafa06ece317d2d5f62f3f78b7b665c /hw/npu2.c | |
| parent | 3e3defbf73e3603c5dc6f168c3de764c14b50e27 (diff) | |
| download | skiboot-d8b161f4b361f70a7bb43be47d4a32b8f937287a.zip skiboot-d8b161f4b361f70a7bb43be47d4a32b8f937287a.tar.gz skiboot-d8b161f4b361f70a7bb43be47d4a32b8f937287a.tar.bz2 | |
npu2: Allow ATSD for LPAR other than 0
Each XTS MMIO ATSD# register is accompanied by another register -
XTS MMIO ATSD0 LPARID# - which controls LPID filtering for ATSD
transactions.
When a host system passes a GPU through to a guest, we need to enable
some ATSD for an LPAR. At the moment the host assigns one ATSD to
a NVLink bridge and this maps it to an LPAR when GPU is assigned to
the LPAR. The link number is used for an ATSD index.
ATSD6&7 stay mapped to the host (LPAR=0) all the time which seems to be
acceptable price for the simplicity.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'hw/npu2.c')
| -rw-r--r-- | hw/npu2.c | 22 |
1 files changed, 18 insertions, 4 deletions
@@ -2117,9 +2117,14 @@ static int opal_npu_map_lpar(uint64_t phb_id, uint64_t bdf, uint64_t lparid, struct phb *phb = pci_get_phb(phb_id); struct npu2 *p; struct npu2_dev *ndev = NULL; - uint64_t xts_bdf_lpar, rc = OPAL_SUCCESS; + uint64_t xts_bdf_lpar, atsd_lpar, rc = OPAL_SUCCESS; int i; int id; + static uint64_t atsd_lpar_regs[] = { + NPU2_XTS_MMIO_ATSD0_LPARID, NPU2_XTS_MMIO_ATSD1_LPARID, + NPU2_XTS_MMIO_ATSD2_LPARID, NPU2_XTS_MMIO_ATSD3_LPARID, + NPU2_XTS_MMIO_ATSD4_LPARID, NPU2_XTS_MMIO_ATSD5_LPARID, + NPU2_XTS_MMIO_ATSD6_LPARID, NPU2_XTS_MMIO_ATSD7_LPARID }; if (!phb || phb->phb_type != phb_type_npu_v2) return OPAL_PARAMETER; @@ -2159,11 +2164,20 @@ static int opal_npu_map_lpar(uint64_t phb_id, uint64_t bdf, uint64_t lparid, xts_bdf_lpar = SETFIELD(NPU2_XTS_BDF_MAP_LPARID, xts_bdf_lpar, lparid); xts_bdf_lpar = SETFIELD(NPU2_XTS_BDF_MAP_LPARSHORT, xts_bdf_lpar, id); - /* Need to find an NVLink to send the ATSDs for this device over */ + /* + * Need to find an NVLink to send the ATSDs for this device over. + * Also, the host allocates an ATSD per NVLink, enable filtering now. + */ + atsd_lpar = SETFIELD(NPU2_XTS_MMIO_ATSD_LPARID, 0, lparid); + if (!lparid) + atsd_lpar = SETFIELD(NPU2_XTS_MMIO_ATSD_MSR_HV, atsd_lpar, 1); + for (i = 0; i < p->total_devices; i++) { if (p->devices[i].nvlink.gpu_bdfn == bdf) { - ndev = &p->devices[i]; - break; + if (!ndev) + ndev = &p->devices[i]; + if (i < ARRAY_SIZE(atsd_lpar_regs)) + npu2_write(p, atsd_lpar_regs[i], atsd_lpar); } } |