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author | Michael Neuling <mikey@neuling.org> | 2017-11-14 22:23:05 +1100 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-11-15 01:03:53 -0600 |
commit | 74d9a50ac2a79d39b07bbe7d7e0bbb72f7f5b026 (patch) | |
tree | 1ab9ed4cb0fb89fd815dcef6f918e2dcc8f45721 /hw/npu2.c | |
parent | 75371796ac595a4ce2f1b6bd254f5f3ad7416a96 (diff) | |
download | skiboot-74d9a50ac2a79d39b07bbe7d7e0bbb72f7f5b026.zip skiboot-74d9a50ac2a79d39b07bbe7d7e0bbb72f7f5b026.tar.gz skiboot-74d9a50ac2a79d39b07bbe7d7e0bbb72f7f5b026.tar.bz2 |
phys-map: Rename GPU_MEM to GPU_MEM_4T_DOWN
This map is soon to be replaced, but we are going to keep it around
for a little while so that we support older hostboot firmware.
Rename it for now.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/npu2.c')
-rw-r--r-- | hw/npu2.c | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -607,7 +607,7 @@ static void npu2_get_gpu_base(struct npu2_dev *ndev, uint64_t *addr, uint64_t *s int group; group = (ndev->bdfn >> 3) & 0x1f; - phys_map_get(ndev->npu->chip_id, GPU_MEM, group, addr, size); + phys_map_get(ndev->npu->chip_id, GPU_MEM_4T_DOWN, group, addr, size); } static void npu2_dn_fixup_gmb(struct dt_node *pd_dn, struct npu2_dev *ndev) @@ -866,16 +866,16 @@ static void npu2_mcd_init(struct npu2 *p) uint64_t size, addr, gpu_min_addr, gpu_max_addr, total_size; /* Init memory cache directory (MCD) registers. */ - phys_map_get(p->chip_id, GPU_MEM, NPU2_LINKS_PER_CHIP - 1, + phys_map_get(p->chip_id, GPU_MEM_4T_DOWN, NPU2_LINKS_PER_CHIP - 1, &gpu_min_addr, NULL); - phys_map_get(p->chip_id, GPU_MEM, 0, &gpu_max_addr, &size); + phys_map_get(p->chip_id, GPU_MEM_4T_DOWN, 0, &gpu_max_addr, &size); gpu_max_addr += size; /* We assume GPU memory is contiguous from the first possible GPU to the * last and that the size is the same so best to check that. */ for (i = 0; i < NPU2_LINKS_PER_CHIP; i++) { uint64_t tmp; - phys_map_get(p->chip_id, GPU_MEM, i, &addr, &tmp); + phys_map_get(p->chip_id, GPU_MEM_4T_DOWN, i, &addr, &tmp); assert((addr >= gpu_min_addr) && (addr + tmp <= gpu_max_addr)); assert(tmp == size); } |