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author | Reza Arbab <arbab@linux.vnet.ibm.com> | 2017-06-02 09:52:51 -0500 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-06-06 20:49:05 +1000 |
commit | 2163407ccceabf859959f3b641f6a169d5229807 (patch) | |
tree | 855632a14ff05a6385b4dbb4e062dda463da1534 /hw/npu2.c | |
parent | c5fa0d718e9cda8999dcb83088118a7ea61814c5 (diff) | |
download | skiboot-2163407ccceabf859959f3b641f6a169d5229807.zip skiboot-2163407ccceabf859959f3b641f6a169d5229807.tar.gz skiboot-2163407ccceabf859959f3b641f6a169d5229807.tar.bz2 |
npu2: Fix npu2_{read,write}_4b()
When writing or reading 4-byte values, we need to use the upper half of
the 64-bit SCOM register.
Fix npu2_{read,write}_4b() and their callers to use uint32_t, and
appropriately shift the value being written or returned.
Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com>
Acked-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/npu2.c')
-rw-r--r-- | hw/npu2.c | 10 |
1 files changed, 6 insertions, 4 deletions
@@ -88,14 +88,16 @@ static uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base, return val; } -void npu2_write_4b(struct npu2 *p, uint64_t reg, uint64_t val) +void npu2_write_4b(struct npu2 *p, uint64_t reg, uint32_t val) { - npu2_scom_write(p->chip_id, p->xscom_base, reg, NPU2_MISC_DA_LEN_4B, val); + npu2_scom_write(p->chip_id, p->xscom_base, reg, NPU2_MISC_DA_LEN_4B, + (uint64_t)val << 32); } -uint64_t npu2_read_4b(struct npu2 *p, uint64_t reg) +uint32_t npu2_read_4b(struct npu2 *p, uint64_t reg) { - return npu2_scom_read(p->chip_id, p->xscom_base, reg, NPU2_MISC_DA_LEN_4B); + return npu2_scom_read(p->chip_id, p->xscom_base, reg, + NPU2_MISC_DA_LEN_4B) >> 32; } void npu2_write(struct npu2 *p, uint64_t reg, uint64_t val) |