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author | Frederic Barrat <fbarrat@linux.ibm.com> | 2019-03-12 21:35:09 +0100 |
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committer | Stewart Smith <stewart@linux.ibm.com> | 2019-03-13 21:55:18 -0500 |
commit | 536c8fbf932d6a790f95cb8cf39dacf4a2de06cb (patch) | |
tree | 2e6345c57b32fbf70f3ab63ec993e2e36087a97e /hw/npu2-opencapi.c | |
parent | 261ca8e779e5138869a45f174caa49be6a274501 (diff) | |
download | skiboot-536c8fbf932d6a790f95cb8cf39dacf4a2de06cb.zip skiboot-536c8fbf932d6a790f95cb8cf39dacf4a2de06cb.tar.gz skiboot-536c8fbf932d6a790f95cb8cf39dacf4a2de06cb.tar.bz2 |
npu2-opencapi: Rework ODL register access
ODL registers used to control the opencapi link state have an address
built on a base address and an offset for each brick which can be
computed instead of hard-coded individually for each brick.
Rework how we access the ODL registers, to avoid repeating switch
statements all over the place.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'hw/npu2-opencapi.c')
-rw-r--r-- | hw/npu2-opencapi.c | 109 |
1 files changed, 9 insertions, 100 deletions
diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c index aa3c434..6ad561c 100644 --- a/hw/npu2-opencapi.c +++ b/hw/npu2-opencapi.c @@ -128,24 +128,11 @@ static inline uint64_t index_to_block(uint64_t index) { } } -static uint64_t get_odl_status(uint32_t gcid, uint64_t index) { +static uint64_t get_odl_status(uint32_t gcid, uint64_t index) +{ uint64_t reg, status_xscom; - switch (index) { - case 2: - status_xscom = OB0_ODL0_STATUS; - break; - case 3: - status_xscom = OB0_ODL1_STATUS; - break; - case 4: - status_xscom = OB3_ODL1_STATUS; - break; - case 5: - status_xscom = OB3_ODL0_STATUS; - break; - default: - assert(false); - } + + status_xscom = OB_ODL_STATUS(index); xscom_read(gcid, status_xscom, ®); return reg; } @@ -154,22 +141,7 @@ static uint64_t get_odl_training_status(uint32_t gcid, uint64_t index) { uint64_t status_xscom, reg; - switch (index) { - case 2: - status_xscom = OB0_ODL0_TRAINING_STATUS; - break; - case 3: - status_xscom = OB0_ODL1_TRAINING_STATUS; - break; - case 4: - status_xscom = OB3_ODL1_TRAINING_STATUS; - break; - case 5: - status_xscom = OB3_ODL0_TRAINING_STATUS; - break; - default: - assert(false); - } + status_xscom = OB_ODL_TRAINING_STATUS(index); xscom_read(gcid, status_xscom, ®); return reg; } @@ -178,22 +150,7 @@ static uint64_t get_odl_endpoint_info(uint32_t gcid, uint64_t index) { uint64_t status_xscom, reg; - switch (index) { - case 2: - status_xscom = OB0_ODL0_ENDPOINT_INFO; - break; - case 3: - status_xscom = OB0_ODL1_ENDPOINT_INFO; - break; - case 4: - status_xscom = OB3_ODL1_ENDPOINT_INFO; - break; - case 5: - status_xscom = OB3_ODL0_ENDPOINT_INFO; - break; - default: - assert(false); - } + status_xscom = OB_ODL_ENDPOINT_INFO(index); xscom_read(gcid, status_xscom, ®); return reg; } @@ -936,23 +893,7 @@ static void reset_odl(uint32_t gcid, struct npu2_dev *dev) { uint64_t reg, config_xscom; - switch (dev->brick_index) { - case 2: - config_xscom = OB0_ODL0_CONFIG; - break; - case 3: - config_xscom = OB0_ODL1_CONFIG; - break; - case 4: - config_xscom = OB3_ODL1_CONFIG; - break; - case 5: - config_xscom = OB3_ODL0_CONFIG; - break; - default: - assert(false); - } - + config_xscom = OB_ODL_CONFIG(dev->brick_index); /* Reset ODL */ reg = OB_ODL_CONFIG_RESET; reg = SETFIELD(OB_ODL_CONFIG_VERSION, reg, 0b000001); @@ -972,23 +913,7 @@ static void set_init_pattern(uint32_t gcid, struct npu2_dev *dev) { uint64_t reg, config_xscom; - switch (dev->brick_index) { - case 2: - config_xscom = OB0_ODL0_CONFIG; - break; - case 3: - config_xscom = OB0_ODL1_CONFIG; - break; - case 4: - config_xscom = OB3_ODL1_CONFIG; - break; - case 5: - config_xscom = OB3_ODL0_CONFIG; - break; - default: - assert(false); - } - + config_xscom = OB_ODL_CONFIG(dev->brick_index); /* Transmit Pattern A */ xscom_read(gcid, config_xscom, ®); reg = SETFIELD(OB_ODL_CONFIG_TRAIN_MODE, reg, 0b0001); @@ -999,23 +924,7 @@ static void start_training(uint32_t gcid, struct npu2_dev *dev) { uint64_t reg, config_xscom; - switch (dev->brick_index) { - case 2: - config_xscom = OB0_ODL0_CONFIG; - break; - case 3: - config_xscom = OB0_ODL1_CONFIG; - break; - case 4: - config_xscom = OB3_ODL1_CONFIG; - break; - case 5: - config_xscom = OB3_ODL0_CONFIG; - break; - default: - assert(false); - } - + config_xscom = OB_ODL_CONFIG(dev->brick_index); /* Start training */ xscom_read(gcid, config_xscom, ®); reg = SETFIELD(OB_ODL_CONFIG_TRAIN_MODE, reg, 0b1000); |