diff options
| author | Reza Arbab <arbab@linux.vnet.ibm.com> | 2017-06-02 09:52:51 -0500 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-06-06 20:49:05 +1000 |
| commit | 2163407ccceabf859959f3b641f6a169d5229807 (patch) | |
| tree | 855632a14ff05a6385b4dbb4e062dda463da1534 /hw/npu2-hw-procedures.c | |
| parent | c5fa0d718e9cda8999dcb83088118a7ea61814c5 (diff) | |
| download | skiboot-2163407ccceabf859959f3b641f6a169d5229807.zip skiboot-2163407ccceabf859959f3b641f6a169d5229807.tar.gz skiboot-2163407ccceabf859959f3b641f6a169d5229807.tar.bz2 | |
npu2: Fix npu2_{read,write}_4b()
When writing or reading 4-byte values, we need to use the upper half of
the 64-bit SCOM register.
Fix npu2_{read,write}_4b() and their callers to use uint32_t, and
appropriately shift the value being written or returned.
Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com>
Acked-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/npu2-hw-procedures.c')
| -rw-r--r-- | hw/npu2-hw-procedures.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index ee1ade6..afe80bd 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -204,11 +204,11 @@ static uint32_t reset_ndl(struct npu2_dev *ndev) npu2_write_mask(ndev->npu, NPU2_NTL_PRI_CFG(ndev), val, -1ULL); - val = PPC_BIT(0) | PPC_BIT(1); + val = PPC_BIT32(0) | PPC_BIT32(1); npu2_write_4b(ndev->npu, NPU2_NTL_DL_CONTROL(ndev), val); npu2_write_4b(ndev->npu, NPU2_NTL_DL_CONTROL(ndev), 0); - npu2_write_4b(ndev->npu, NPU2_NTL_DL_CONFIG(ndev), PPC_BIT(0)); + npu2_write_4b(ndev->npu, NPU2_NTL_DL_CONFIG(ndev), PPC_BIT32(0)); /* NTL Reset */ val = PPC_BIT(8) | PPC_BIT(9); |