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| author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2021-10-14 17:57:03 +0200 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-10-19 12:26:02 +0530 |
| commit | 2d89dd334756d19a9ffc3e4c784406177f46c053 (patch) | |
| tree | e31c9da1b6a84def34305db432ddca09448dcbfa /hw/npu-opal.c | |
| parent | d5b79b2e9bb63ec18b5b5e4d027d5d1d1b0a4e28 (diff) | |
| download | skiboot-2d89dd334756d19a9ffc3e4c784406177f46c053.zip skiboot-2d89dd334756d19a9ffc3e4c784406177f46c053.tar.gz skiboot-2d89dd334756d19a9ffc3e4c784406177f46c053.tar.bz2 | |
pau: mmio invalidates
The remaining translation mode: OpenCAPI 5.0 with TLBI/SLBI Snooping, is
not used due to performance problems caused by the mismatch between the
ERAT and Bloom Filter sizes.
When the Address Translation Mode requires TLB and SLB Invalidate
operations to be initiated using MMIO registers, a set of registers like
the following is used:
• XTS MMIO ATSD0 LPARID register
• XTS MMIO ATSD0 AVA register
• XTS MMIO ATSD0 launch register, write access initiates a shoot down
• XTS MMIO ATSD0 status register
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'hw/npu-opal.c')
| -rw-r--r-- | hw/npu-opal.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/npu-opal.c b/hw/npu-opal.c index cf13690..2e455dc 100644 --- a/hw/npu-opal.c +++ b/hw/npu-opal.c @@ -52,6 +52,9 @@ static int64_t opal_npu_map_lpar(uint64_t phb_id, uint64_t bdf, uint64_t lparid, if (phb->phb_type == phb_type_npu_v2) return npu2_map_lpar(phb, bdf, lparid, lpcr); + if (phb->phb_type == phb_type_pau_opencapi) + return pau_opencapi_map_atsd_lpar(phb, bdf, lparid, lpcr); + return OPAL_PARAMETER; } opal_call(OPAL_NPU_MAP_LPAR, opal_npu_map_lpar, 4); |