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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2017-04-10 17:40:57 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-04-27 14:16:19 +1000 |
| commit | b74841db759d33d6823a8f39603e07319b90103b (patch) | |
| tree | 2a516a7404c841bebd5e2b1446f19a27e0afce4e /hw/npu-hw-procedures.c | |
| parent | 50e1921f98e4b1b15a748fa7dbc01a71a11b61c4 (diff) | |
| download | skiboot-b74841db759d33d6823a8f39603e07319b90103b.zip skiboot-b74841db759d33d6823a8f39603e07319b90103b.tar.gz skiboot-b74841db759d33d6823a8f39603e07319b90103b.tar.bz2 | |
npu: Implement FLR
As the comment in npu_dev_populate_pcie_cap() says,
"We should support FLR" and the NPU device advertises its
support. However, when the kernel issues FLR, skiboot does
nothing which leaves NPU in a state which does not allow
to use NV links again after GPU was reset.
This adds basic handling of FLR (function level reset).
This does not update hreset/freset handlers as they are not going to be
called under any circumstance - EEH is not supported for NPU and
the kernel won't issue OPAL reset otherwise.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Acked-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/npu-hw-procedures.c')
| -rw-r--r-- | hw/npu-hw-procedures.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/hw/npu-hw-procedures.c b/hw/npu-hw-procedures.c index 85f09a1..cabc9c9 100644 --- a/hw/npu-hw-procedures.c +++ b/hw/npu-hw-procedures.c @@ -606,3 +606,11 @@ int64_t npu_dev_procedure(void *dev, struct pci_cfg_reg_filter *pcrf, return npu_dev_procedure_read(ndev, offset - pcrf->start, len, data); } + +void npu_dev_procedure_reset(struct npu_dev *dev) +{ + dev->procedure_status = 0; + dev->procedure_number = 0; + dev->procedure_step = 0; + dev->procedure_data = 0; +} |