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authorVipin K Parashar <vipin@linux.vnet.ibm.com>2016-03-29 08:56:47 +0530
committerStewart Smith <stewart@linux.vnet.ibm.com>2016-05-03 19:00:51 +1000
commit1abcd4995cfe69c710e883cfa4f5f16f6dbfd6a9 (patch)
tree183a34d7f486452fb47c89a1bbab5050119e007b /hw/lpc.c
parent054cddb6f463a6df73da96a76081b2005e5c89e7 (diff)
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hw/lpc: Log LPC SYNC errors as OPAL_PLATFORM_ERR_EVT errors
Log LPC SYNC errors as OPAL_PLATFORM_ERR_EVT errors with generic predictive error (OPAL_PREDICTIVE_ERR_GENERAL) severity. Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: use const char* rather than strcpy] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/lpc.c')
-rw-r--r--hw/lpc.c25
1 files changed, 16 insertions, 9 deletions
diff --git a/hw/lpc.c b/hw/lpc.c
index 60fefdb..d2a72f1 100644
--- a/hw/lpc.c
+++ b/hw/lpc.c
@@ -35,6 +35,10 @@ DEFINE_LOG_ENTRY(OPAL_RC_LPC_WRITE, OPAL_PLATFORM_ERR_EVT, OPAL_LPC,
OPAL_MISC_SUBSYSTEM, OPAL_PREDICTIVE_ERR_GENERAL,
OPAL_NA);
+DEFINE_LOG_ENTRY(OPAL_RC_LPC_SYNC, OPAL_PLATFORM_ERR_EVT, OPAL_LPC,
+ OPAL_MISC_SUBSYSTEM, OPAL_PREDICTIVE_ERR_GENERAL,
+ OPAL_NA);
+
#define ECCB_CTL 0 /* b0020 -> b00200 */
#define ECCB_STAT 2 /* b0022 -> b00210 */
#define ECCB_DATA 3 /* b0023 -> b00218 */
@@ -614,6 +618,7 @@ static void lpc_dispatch_reset(struct proc_chip *chip)
static void lpc_dispatch_err_irqs(struct proc_chip *chip, uint32_t irqs)
{
int rc;
+ const char *sync_err;
uint32_t err_addr;
/* Write back to clear error interrupts, we clear SerIRQ later
@@ -624,28 +629,30 @@ static void lpc_dispatch_err_irqs(struct proc_chip *chip, uint32_t irqs)
if (rc)
prerror("LPC: Failed to clear IRQ error latches !\n");
-
if (irqs & LPC_HC_IRQ_LRESET)
lpc_dispatch_reset(chip);
if (irqs & LPC_HC_IRQ_SYNC_ABNORM_ERR)
- prerror("LPC: Got SYNC abnormal error\n");
+ sync_err = "LPC: Got SYNC abnormal error.";
if (irqs & LPC_HC_IRQ_SYNC_NORESP_ERR)
- prerror("LPC: Got SYNC no-response error\n");
+ sync_err = "LPC: Got SYNC no-response error.";
if (irqs & LPC_HC_IRQ_SYNC_NORM_ERR)
- prerror("LPC: Got SYNC normal error\n");
+ sync_err = "LPC: Got SYNC normal error.";
if (irqs & LPC_HC_IRQ_SYNC_TIMEOUT_ERR)
- prerror("LPC: Got SYNC timeout error\n");
+ sync_err = "LPC: Got SYNC timeout error.";
if (irqs & LPC_HC_IRQ_TARG_TAR_ERR)
- prerror("LPC: Got abnormal TAR error\n");
+ sync_err = "LPC: Got abnormal TAR error.";
if (irqs & LPC_HC_IRQ_BM_TAR_ERR)
- prerror("LPC: Got bus master TAR error\n");
+ sync_err = "LPC: Got bus master TAR error.";
rc = opb_read(chip, lpc_reg_opb_base + LPC_HC_ERROR_ADDRESS,
&err_addr, 4);
if (rc)
- prerror("LPC: Error reading error address register\n");
+ log_simple_error(&e_info(OPAL_RC_LPC_SYNC), "%s "
+ "Error reading error address register\n", sync_err);
else
- prerror("LPC: Error address reg: 0x%08x\n", err_addr);
+ log_simple_error(&e_info(OPAL_RC_LPC_SYNC), "%s "
+ "Error address reg: 0x%08x\n",
+ sync_err, err_addr);
}
static void lpc_dispatch_ser_irqs(struct proc_chip *chip, uint32_t irqs,