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authorMichael Neuling <mikey@neuling.org>2017-11-16 12:50:22 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-11-15 20:21:42 -0600
commit4e74625dc9f1e1d080128203dc410ff0027c4fcf (patch)
treecae23620068128dc71633681ca8cf56edd9f5078 /hdata
parent4002ea166fde4b4e44f6571027c60c6b75df5c33 (diff)
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hdata: Fix copying GEN4 lane equalisation settings
These aren't copied currently but should be. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hdata')
-rw-r--r--hdata/iohub.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/hdata/iohub.c b/hdata/iohub.c
index 134fa04..a5f12fd 100644
--- a/hdata/iohub.c
+++ b/hdata/iohub.c
@@ -280,6 +280,8 @@ static struct dt_node *add_pec_stack(const struct cechub_io_hub *hub,
for (i = 0; i < 4; i++) /* gen 3 eq settings */
eq[i] = be64_to_cpu(hub->phb_lane_eq[phb_index][i]);
+ for (i = 0; i < 4; i++) /* gen 4 eq settings */
+ eq[i+4] = be64_to_cpu(hub->phb4_lane_eq[phb_index][i]);
/* Lane-eq settings are packed 2 bytes per lane for 16 lanes
* On P9 DD1, 2 bytes per lane are used in the hardware