Remove POWER7 and POWER7+ support

It's been a good long while since either OPAL POWER7 user touched a
machine, and even longer since they'd have been okay using an old
version rather than tracking master.

There's also been no testing of OPAL on POWER7 systems for an awfully
long time, so it's pretty safe to assume that it's very much bitrotted.

It also saves a whole 14kb of xz compressed payload space.

Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Enthusiasticly-Acked-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>

6 files changed, 5 insertions, 244 deletions

diff --git a/hdata/cpu-common.c b/hdata/cpu-common.c
index f6dda4e..0924dd5 100644
--- a/hdata/cpu-common.c
+++ b/hdata/cpu-common.c
@@ -30,12 +30,6 @@ struct dt_node * add_core_common(struct dt_node *cpus,
 	struct dt_node *cpu;
 	uint32_t version;
 	uint64_t freq;
-	const uint8_t pa_features_p7[] = {
-		6, 0,
-		0xf6, 0x3f, 0xc7, 0x00, 0x80, 0xc0 };
-	const uint8_t pa_features_p7p[] = {
-		6, 0,
-		0xf6, 0x3f, 0xc7, 0xc0, 0x80, 0xc0 };
 	const uint8_t pa_features_p8[] = {
 	       24, 0,
 	       0xf6, 0x3f, 0xc7, 0xc0, 0x80, 0xd0, 0x80, 0x00,
@@ -80,16 +74,6 @@ struct dt_node * add_core_common(struct dt_node *cpus,
 	 */
 	version = mfspr(SPR_PVR);
 	switch(PVR_TYPE(version)) {
-	case PVR_TYPE_P7:
-		name = "PowerPC,POWER7";
-		pa_features = pa_features_p7;
-		pa_features_size = sizeof(pa_features_p7);
-		break;
-	case PVR_TYPE_P7P:
-		name = "PowerPC,POWER7+";
-		pa_features = pa_features_p7p;
-		pa_features_size = sizeof(pa_features_p7p);
-		break;
 	case PVR_TYPE_P8E:
 	case PVR_TYPE_P8:
 	case PVR_TYPE_P8NVL:
diff --git a/hdata/iohub.c b/hdata/iohub.c
index feb8d6a..c81dc5e 100644
--- a/hdata/iohub.c
+++ b/hdata/iohub.c
@@ -22,43 +22,12 @@
 #include <ccan/str/str.h>
 #include <ccan/array_size/array_size.h>
 #include <device.h>
-#include <p7ioc.h>
 #include <vpd.h>
 #include <inttypes.h>
 #include <string.h>
 
 #include "hdata.h"
 
-static void io_add_common(struct dt_node *hn, const struct cechub_io_hub *hub)
-{
-	dt_add_property_cells(hn, "#address-cells", 2);
-	dt_add_property_cells(hn, "#size-cells", 2);
-	dt_add_property_cells(hn, "ibm,buid-ext", be32_to_cpu(hub->buid_ext));
-	dt_add_property_cells(hn, "ibm,chip-id",
-			      pcid_to_chip_id(be32_to_cpu(hub->proc_chip_id)));
-	dt_add_property_cells(hn, "ibm,gx-index", be32_to_cpu(hub->gx_index));
-	dt_add_property_cells(hn, "revision", be32_to_cpu(hub->ec_level));
-
-	/* Instead of exposing the GX BARs as separate ranges as we *should*
-	 * do in an ideal world, we just create a pass-through ranges and
-	 * we use separate properties for the BARs.
-	 *
-	 * This is hackish but will do for now and avoids us having to
-	 * do too complex ranges property parsing
-	 */
-	dt_add_property(hn, "ranges", NULL, 0);
-	dt_add_property_u64(hn, "ibm,gx-bar-1", be64_to_cpu(hub->gx_ctrl_bar1));
-	dt_add_property_u64(hn, "ibm,gx-bar-2", be64_to_cpu(hub->gx_ctrl_bar2));
-
-	/* Add presence detect if valid */
-	if (hub->flags & CECHUB_HUB_FLAG_FAB_BR0_PDT)
-		dt_add_property_cells(hn, "ibm,br0-presence-detect",
-				      hub->fab_br0_pdt);
-	if (hub->flags & CECHUB_HUB_FLAG_FAB_BR1_PDT)
-		dt_add_property_cells(hn, "ibm,br1-presence-detect",
-				      hub->fab_br1_pdt);
-}
-
 static bool io_get_lx_info(const void *kwvpd, unsigned int kwvpd_sz,
 			   int lx_idx, struct dt_node *hn)
 {
@@ -131,63 +100,6 @@ static void io_get_loc_code(const void *sp_iohubs, struct dt_node *hn, const cha
 	}
 }
 
-static struct dt_node *io_add_p7ioc(const struct cechub_io_hub *hub,
-				    const void *sp_iohubs)
-{
-	struct dt_node *hn;
-	uint64_t reg[2];
-
-	const void *kwvpd;
-	unsigned int kwvpd_sz;
-
-	prlog(PR_DEBUG, "    GX#%d BUID_Ext = 0x%x\n",
-	      be32_to_cpu(hub->gx_index),
-	      be32_to_cpu(hub->buid_ext));
-	prlog(PR_DEBUG, "    GX BAR 0 = 0x%016"PRIx64"\n",
-	      be64_to_cpu(hub->gx_ctrl_bar0));
-	prlog(PR_DEBUG, "    GX BAR 1 = 0x%016"PRIx64"\n",
-	      be64_to_cpu(hub->gx_ctrl_bar1));
-	prlog(PR_DEBUG, "    GX BAR 2 = 0x%016"PRIx64"\n",
-	      be64_to_cpu(hub->gx_ctrl_bar2));
-	prlog(PR_DEBUG, "    GX BAR 3 = 0x%016"PRIx64"\n",
-	      be64_to_cpu(hub->gx_ctrl_bar3));
-	prlog(PR_DEBUG, "    GX BAR 4 = 0x%016"PRIx64"\n",
-	      be64_to_cpu(hub->gx_ctrl_bar4));
-
-	/* We only know about memory map 1 */
-	if (be32_to_cpu(hub->mem_map_vers) != 1) {
-		prerror("P7IOC: Unknown memory map %d\n", be32_to_cpu(hub->mem_map_vers));
-		/* We try to continue anyway ... */
-	}
-
-	reg[0] = cleanup_addr(be64_to_cpu(hub->gx_ctrl_bar1));
-	reg[1] = 0x2000000;
-
-	hn = dt_new_addr(dt_root, "io-hub", reg[0]);
-	if (!hn)
-		return NULL;
-
-	dt_add_property(hn, "reg", reg, sizeof(reg));
-	dt_add_property_strings(hn, "compatible", "ibm,p7ioc", "ibm,ioda-hub");
-
-	kwvpd = HDIF_get_idata(sp_iohubs, CECHUB_ASCII_KEYWORD_VPD, &kwvpd_sz);
-	if (kwvpd && kwvpd != sp_iohubs) {
-		/*
-		 * XX We don't know how to properly find the LXRn
-		 * record so for now we'll just try LXR0 and if not
-		 * found, we try LXR1
-		 */
-		if (!io_get_lx_info(kwvpd, kwvpd_sz, 0, hn))
-			io_get_lx_info(kwvpd, kwvpd_sz, 1, hn);
-	} else {
-		prlog(PR_DEBUG, "CEC:     P7IOC Keywords not found.\n");
-	}
-
-	io_get_loc_code(sp_iohubs, hn, "ibm,io-base-loc-code");
-
-	return hn;
-}
-
 static struct dt_node *io_add_phb3(const struct cechub_io_hub *hub,
 				   const struct HDIF_common_hdr *sp_iohubs,
 				   unsigned int index, struct dt_node *xcom,
@@ -856,7 +768,6 @@ static void io_parse_fru(const void *sp_iohubs)
 	for (i = 0; i < count; i++) {
 		const struct cechub_io_hub *hub;
 		unsigned int size, hub_id;
-		struct dt_node *hn;
 		uint32_t chip_id;
 
 		hub = HDIF_get_iarray_item(sp_iohubs, CECHUB_FRU_IO_HUBS,
@@ -892,11 +803,6 @@ static void io_parse_fru(const void *sp_iohubs)
 		      be32_to_cpu(hub->ec_level), be16_to_cpu(hub->hub_num));
 
 		switch(hub_id) {
-		case CECHUB_HUB_P7IOC:
-			prlog(PR_INFO, "CEC:     P7IOC !\n");
-			hn = io_add_p7ioc(hub, sp_iohubs);
-			io_add_common(hn, hub);
-			break;
 		case CECHUB_HUB_MURANO:
 		case CECHUB_HUB_MURANO_SEGU:
 			prlog(PR_INFO, "CEC:     Murano !\n");
diff --git a/hdata/pcia.c b/hdata/pcia.c
index 9b210e4..0638327 100644
--- a/hdata/pcia.c
+++ b/hdata/pcia.c
@@ -158,9 +158,7 @@ static struct dt_node *add_core_node(struct dt_node *cpus,
 					 be32_to_cpu(t->pir), okay);
 	dt_add_property_cells(cpu, "l2-cache", l2_phandle);
 
-	if (proc_gen == proc_gen_p7)
-		icp_compat = "IBM,power7-icp";
-	else
+	if (proc_gen == proc_gen_p8)
 		icp_compat = "IBM,power8-icp";
 
 	/* Get HW Chip ID */
@@ -182,7 +180,7 @@ static struct dt_node *add_core_node(struct dt_node *cpus,
 
 	dt_add_property(cpu, "ibm,ppc-interrupt-server#s", iserv, 4 * threads);
 
-	/* Add the ICP node for this CPU for P7 / P8 */
+	/* Add the ICP node for this CPU for P8 */
 	if (proc_gen <= proc_gen_p8)
 		add_xics_icp(pcia, threads, icp_compat);
 
diff --git a/hdata/spira.c b/hdata/spira.c
index 43c76f9..6891a9c 100644
--- a/hdata/spira.c
+++ b/hdata/spira.c
@@ -255,9 +255,8 @@ static struct dt_node *add_xscom_node(uint64_t base, uint32_t hw_id,
 	uint64_t freq;
 
 	switch (proc_gen) {
-	case proc_gen_p7:
 	case proc_gen_p8:
-		/* On P7 and P8 all the chip SCOMs share single region */
+		/* On P8 all the chip SCOMs share single region */
 		addr = base | ((uint64_t)hw_id << PPC_BITLSHIFT(28));
 		break;
 	case proc_gen_p9:
@@ -285,10 +284,6 @@ static struct dt_node *add_xscom_node(uint64_t base, uint32_t hw_id,
 	dt_add_property(node, "scom-controller", NULL, 0);
 
 	switch(proc_gen) {
-	case proc_gen_p7:
-		dt_add_property_strings(node, "compatible",
-					"ibm,xscom", "ibm,power7-xscom");
-		break;
 	case proc_gen_p8:
 		dt_add_property_strings(node, "compatible",
 					"ibm,xscom", "ibm,power8-xscom");
@@ -375,11 +370,6 @@ static void add_psihb_node(struct dt_node *np)
 
 	/* PSI host bridge */
 	switch(proc_gen) {
-	case proc_gen_p7:
-		psi_scom = 0x2010c00;
-		psi_slen = 0x10;
-		psi_comp = "ibm,power7-psihb-x";
-		break;
 	case proc_gen_p8:
 		psi_scom = 0x2010900;
 		psi_slen = 0x20;
@@ -635,72 +625,6 @@ static bool add_xscom_sppcrd(uint64_t xscom_base)
 	return i > 0;
 }
 
-static void add_xscom_sppaca(uint64_t xscom_base)
-{
-	const struct HDIF_common_hdr *hdif;
-	unsigned int i;
-	struct dt_node *np, *vpd_node;
-
-	for_each_ntuple_idx(&spira.ntuples.paca, hdif, i, PACA_HDIF_SIG) {
-		const struct sppaca_cpu_id *id;
-		unsigned int chip_id, size;
-		int ve;
-
-		/* We only suport old style PACA on P7 ! */
-		assert(proc_gen == proc_gen_p7);
-
-		id = HDIF_get_idata(hdif, SPPACA_IDATA_CPU_ID, &size);
-
-		if (!CHECK_SPPTR(id)) {
-			prerror("XSCOM: Bad processor data %d\n", i);
-			continue;
-		}
-
-		ve = be32_to_cpu(id->verify_exists_flags) & CPU_ID_VERIFY_MASK;
-		ve >>= CPU_ID_VERIFY_SHIFT;
-		if (ve == CPU_ID_VERIFY_NOT_INSTALLED ||
-		    ve == CPU_ID_VERIFY_UNUSABLE)
-			continue;
-
-		/* Convert to HW chip ID */
-		chip_id = P7_PIR2GCID(be32_to_cpu(id->pir));
-
-		/* do we already have an XSCOM for this chip? */
-		if (find_xscom_for_chip(chip_id))
-			continue;
-
-		/* Create the XSCOM node */
-		np = add_xscom_node(xscom_base, chip_id,
-				    be32_to_cpu(id->processor_chip_id));
-		if (!np)
-			continue;
-
-		/* Add chip VPD */
-		vpd_node = dt_add_vpd_node(hdif, SPPACA_IDATA_FRU_ID,
-					   SPPACA_IDATA_KW_VPD);
-		if (vpd_node)
-			dt_add_property_cells(vpd_node, "ibm,chip-id", chip_id);
-
-		/* Add chip associativity data */
-		dt_add_property_cells(np, "ibm,ccm-node-id",
-				      be32_to_cpu(id->ccm_node_id));
-		if (size > SPIRA_CPU_ID_MIN_SIZE) {
-			dt_add_property_cells(np, "ibm,hw-card-id",
-					      be32_to_cpu(id->hw_card_id));
-			dt_add_property_cells(np, "ibm,hw-module-id",
-					  be32_to_cpu(id->hardware_module_id));
-			if (!dt_find_property(np, "ibm,dbob-id"))
-				dt_add_property_cells(np, "ibm,dbob-id",
-				  be32_to_cpu(id->drawer_book_octant_blade_id));
-			dt_add_property_cells(np, "ibm,mem-interleave-scope",
-				 be32_to_cpu(id->memory_interleaving_scope));
-		}
-
-		/* Add PSI Host bridge */
-		add_psihb_node(np);
-	}
-}
-
 static void add_xscom(void)
 {
 	const void *ms_vpd;
@@ -727,23 +651,12 @@ static void add_xscom(void)
 
 	xscom_base = be64_to_cpu(pmbs->xscom_addr);
 
-	/* Some FSP (on P7) give me a crap base address for XSCOM (it has
-	 * spurious bits set as far as I can tell). Since only 5 bits 18:22 can
-	 * be programmed in hardware, let's isolate these. This seems to give
-	 * me the right value on VPL1
-	 */
-	if (cpu_type == PVR_TYPE_P7)
-		xscom_base &= 0x80003e0000000000ul;
-
 	/* Get rid of the top bits */
 	xscom_base = cleanup_addr(xscom_base);
 
 	/* First, try the new proc_chip ntuples for chip data */
 	if (add_xscom_sppcrd(xscom_base))
 		return;
-
-	/* Otherwise, check the old-style PACA, looking for unique chips */
-	add_xscom_sppaca(xscom_base);
 }
 
 static void add_chiptod_node(unsigned int chip_id, int flags)
@@ -766,9 +679,6 @@ static void add_chiptod_node(unsigned int chip_id, int flags)
 	len = 0x34;
 
 	switch(proc_gen) {
-	case proc_gen_p7:
-		compat_str = "ibm,power7-chiptod";
-		break;
 	case proc_gen_p8:
 		compat_str = "ibm,power8-chiptod";
 		break;
@@ -908,10 +818,6 @@ static void add_nx_node(u32 gcid)
 		return;
 
 	switch (proc_gen) {
-	case proc_gen_p7:
-		dt_add_property_strings(nx, "compatible", "ibm,power-nx",
-					"ibm,power7-nx");
-		break;
 	case proc_gen_p8:
 		dt_add_property_strings(nx, "compatible", "ibm,power-nx",
 					"ibm,power8-nx");
@@ -1314,24 +1220,6 @@ uint32_t pcid_to_chip_id(uint32_t proc_chip_id)
 			return be32_to_cpu(cinfo->xscom_id);
 	}
 
-	/* Otherwise, check the old-style PACA, looking for unique chips */
-	for_each_ntuple_idx(&spira.ntuples.paca, hdif, i, PACA_HDIF_SIG) {
-		const struct sppaca_cpu_id *id;
-
-		/* We only suport old style PACA on P7 ! */
-		assert(proc_gen == proc_gen_p7);
-
-		id = HDIF_get_idata(hdif, SPPACA_IDATA_CPU_ID, NULL);
-
-		if (!CHECK_SPPTR(id)) {
-			prerror("XSCOM: Bad processor data %d\n", i);
-			continue;
-		}
-
-		if (proc_chip_id == be32_to_cpu(id->processor_chip_id))
-			return P7_PIR2GCID(be32_to_cpu(id->pir));
-	}
-
 	/* Not found, what to do ? Assert ? For now return a number
 	 * guaranteed to not exist
 	 */
diff --git a/hdata/spira.h b/hdata/spira.h
index 41159d2..09de4da 100644
--- a/hdata/spira.h
+++ b/hdata/spira.h
@@ -518,11 +518,6 @@ struct msvpd_pmover_bsr_synchro {
 #define MSVPD_PMS_FLAG_PMOVER_EN	0x40000000
 #define MSVPD_PMS_FLAG_BSR_EN		0x20000000
 #define MSVPD_PMS_FLAG_XSCOMBASE_VALID	0x10000000
-	/* P7 values for BSR mode */
-#define MSVPD_PMS_FLAG_P7BSR_1M_MODE	0x00000000
-#define MSVPD_PMS_FLAG_P7BSR_2M_MODE	0x02000000
-#define MSVPD_PMS_FLAG_P7BSR_4M_MODE	0x04000000
-#define MSVPD_PMS_FLAG_P7BSR_8M_MODE	0x06000000
 	__be32		hwlocks_per_page;
 	__be64		hwlock_addr;
 	__be64		pmover_addr;
@@ -655,7 +650,6 @@ struct cechub_io_hub {
 #define CECHUB_HUB_FAB_BR1_PDT_PHB4	0x08 /* p7ioc only */
 #define CECHUB_HUB_FAB_BR1_PDT_PHB5	0x04 /* p7ioc only */
 	__be16		iohub_id;	/* the type of hub */
-#define CECHUB_HUB_P7IOC		0x60e7	/* from VPL3 */
 #define CECHUB_HUB_MURANO		0x20ef	/* Murano from spec */
 #define CECHUB_HUB_MURANO_SEGU		0x0001	/* Murano+Seguso from spec */
 #define CECHUB_HUB_VENICE_WYATT		0x0010	/* Venice+Wyatt from spec */
diff --git a/hdata/test/hdata_to_dt.c b/hdata/test/hdata_to_dt.c
index 5d30600..8692177 100644
--- a/hdata/test/hdata_to_dt.c
+++ b/hdata/test/hdata_to_dt.c
@@ -63,15 +63,11 @@ unsigned long tb_hz = 512000000;
 #define PVR_VERS_MIN(_pvr)	GETFIELD(SPR_PVR_VERS_MIN, _pvr)
 
 /* PVR definitions - copied from skiboot include/processor.h */
-#define PVR_TYPE_P7	0x003f
-#define PVR_TYPE_P7P	0x004a
 #define PVR_TYPE_P8E	0x004b
 #define PVR_TYPE_P8	0x004d
 #define PVR_TYPE_P8NVL	0x004c
 #define PVR_TYPE_P9	0x004e
 #define PVR_TYPE_P9P	0x004f
-#define PVR_P7		0x003f0201
-#define PVR_P7P		0x004a0201
 #define PVR_P8E		0x004b0201
 #define PVR_P8		0x004d0200
 #define PVR_P8NVL	0x004c0100
@@ -103,7 +99,7 @@ static inline struct cpu_job *cpu_queue_job(struct cpu_thread *cpu,
 }
 
 struct cpu_thread __boot_cpu, *boot_cpu = &__boot_cpu;
-static unsigned long fake_pvr = PVR_P7;
+static unsigned long fake_pvr = PVR_P8;
 
 static inline unsigned long mfspr(unsigned int spr)
 {
@@ -186,7 +182,7 @@ void op_display(enum op_severity s, enum op_module m, uint16_t code)
 
 char __rodata_start[1], __rodata_end[1];
 
-enum proc_gen proc_gen = proc_gen_p7;
+enum proc_gen proc_gen = proc_gen_p8;
 
 static bool spira_check_ptr(const void *ptr, const char *file, unsigned int line)
 {
@@ -316,10 +312,6 @@ int main(int argc, char *argv[])
 		} else if (strcmp(argv[i], "-b") == 0) {
 			blobs = true;
 			opt_count++;
-		} else if (strcmp(argv[i], "-7") == 0) {
-			fake_pvr = PVR_P7;
-			proc_gen = proc_gen_p7;
-			opt_count++;
 		} else if (strcmp(argv[i], "-8E") == 0) {
 			fake_pvr = PVR_P8;
 			proc_gen = proc_gen_p8;
@@ -352,7 +344,6 @@ int main(int argc, char *argv[])
 		     "	-q Quiet mode\n"
 		     "	-b Keep blobs in the output\n"
 		     "\n"
-		     "  -7 Force PVR to POWER7\n"
 		     "  -8 Force PVR to POWER8\n"
 		     "  -8E Force PVR to POWER8E\n"
 		     "  -9 Force PVR to POWER9 (nimbus)\n"