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author | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2017-10-13 16:51:18 +0530 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-12-18 17:58:32 -0600 |
commit | 5110b54067c0db11122ab9a57dd2dcc56f026581 (patch) | |
tree | d7dc013bf9ee0baf8c1906707213d03901a99e1d /hdata/test | |
parent | 1953b41e1dd5a1a91d6e6a5dbfba0672955defc9 (diff) | |
download | skiboot-5110b54067c0db11122ab9a57dd2dcc56f026581.zip skiboot-5110b54067c0db11122ab9a57dd2dcc56f026581.tar.gz skiboot-5110b54067c0db11122ab9a57dd2dcc56f026581.tar.bz2 |
hdata: Add memory hierarchy under xscom node
We have memory to chip mapping but doesn't have complete memory hierarchy.
This patch adds memory hierarchy under xscom node. This is specific to
P9 system as these hierarchy may change between processor generation.
It uses memory controller ID details and populates nodes like:
xscom@<addr>/mcbist@<mcbist_id>/mcs@<mcs_id>/mca@<mca_id>/dimm@<resource_id>
Also this patch adds few properties under dimm node.
Finally make sure xscom nodes created before calling memory_parse().
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hdata/test')
-rw-r--r-- | hdata/test/p8-840-spira.dts | 10 | ||||
-rw-r--r-- | hdata/test/p81-811.spira.dts | 20 |
2 files changed, 15 insertions, 15 deletions
diff --git a/hdata/test/p8-840-spira.dts b/hdata/test/p8-840-spira.dts index 3e6bf6e..8877b5f 100644 --- a/hdata/test/p8-840-spira.dts +++ b/hdata/test/p8-840-spira.dts @@ -568,7 +568,7 @@ }; memory@0 { - phandle = <0x41>; + phandle = <0x45>; device_type = "memory"; ibm,chip-id = <0x0>; reg = <0x0 0x0 0x8 0x0>; @@ -864,7 +864,7 @@ }; xscom@3fc0000000000 { - phandle = <0x42>; + phandle = <0x41>; ibm,chip-id = <0x0>; ibm,proc-chip-id = <0x0>; #address-cells = <0x1>; @@ -918,7 +918,7 @@ }; psihb@2010900 { - phandle = <0x43>; + phandle = <0x42>; reg = <0x2010900 0x20>; compatible = "ibm,power8-psihb-x", "ibm,psihb-x"; boot-link; @@ -927,7 +927,7 @@ }; xscom@3fc0800000000 { - phandle = <0x44>; + phandle = <0x43>; ibm,chip-id = <0x1>; ibm,proc-chip-id = <0x1>; #address-cells = <0x1>; @@ -981,7 +981,7 @@ }; psihb@2010900 { - phandle = <0x45>; + phandle = <0x44>; reg = <0x2010900 0x20>; compatible = "ibm,power8-psihb-x", "ibm,psihb-x"; }; diff --git a/hdata/test/p81-811.spira.dts b/hdata/test/p81-811.spira.dts index d354ad5..669b24e 100644 --- a/hdata/test/p81-811.spira.dts +++ b/hdata/test/p81-811.spira.dts @@ -1660,14 +1660,14 @@ }; memory@0 { - phandle = <0x81>; + phandle = <0x89>; device_type = "memory"; ibm,chip-id = <0x0>; reg = <0x0 0x0 0x10 0x0>; }; memory@1000000000 { - phandle = <0x82>; + phandle = <0x8a>; device_type = "memory"; ibm,chip-id = <0x10>; reg = <0x10 0x0 0x10 0x0>; @@ -2059,7 +2059,7 @@ }; xscom@3fc0000000000 { - phandle = <0x83>; + phandle = <0x81>; ibm,chip-id = <0x0>; ibm,proc-chip-id = <0x0>; #address-cells = <0x1>; @@ -2113,7 +2113,7 @@ }; psihb@2010900 { - phandle = <0x84>; + phandle = <0x82>; reg = <0x2010900 0x20>; compatible = "ibm,power8-psihb-x", "ibm,psihb-x"; boot-link; @@ -2122,7 +2122,7 @@ }; xscom@3fc0800000000 { - phandle = <0x85>; + phandle = <0x83>; ibm,chip-id = <0x1>; ibm,proc-chip-id = <0x1>; #address-cells = <0x1>; @@ -2175,14 +2175,14 @@ }; psihb@2010900 { - phandle = <0x86>; + phandle = <0x84>; reg = <0x2010900 0x20>; compatible = "ibm,power8-psihb-x", "ibm,psihb-x"; }; }; xscom@3fc8000000000 { - phandle = <0x87>; + phandle = <0x85>; ibm,chip-id = <0x10>; ibm,proc-chip-id = <0x2>; #address-cells = <0x1>; @@ -2225,7 +2225,7 @@ }; psihb@2010900 { - phandle = <0x88>; + phandle = <0x86>; reg = <0x2010900 0x20>; compatible = "ibm,power8-psihb-x", "ibm,psihb-x"; status = "ok"; @@ -2233,7 +2233,7 @@ }; xscom@3fc8800000000 { - phandle = <0x89>; + phandle = <0x87>; ibm,chip-id = <0x11>; ibm,proc-chip-id = <0x3>; #address-cells = <0x1>; @@ -2286,7 +2286,7 @@ }; psihb@2010900 { - phandle = <0x8a>; + phandle = <0x88>; reg = <0x2010900 0x20>; compatible = "ibm,power8-psihb-x", "ibm,psihb-x"; }; |