diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-12-01 14:16:31 +1100 |
---|---|---|
committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2014-12-01 15:02:49 +1100 |
commit | c5689dbef4f3c8af565d2807bb65d1f6b7d6f9f8 (patch) | |
tree | d6860252df52237aaec2e88fe4bb2a6bb65dc01d /external | |
parent | 9594a715b50c338f1261e88c12c120cf8e5b8bba (diff) | |
download | skiboot-c5689dbef4f3c8af565d2807bb65d1f6b7d6f9f8.zip skiboot-c5689dbef4f3c8af565d2807bb65d1f6b7d6f9f8.tar.gz skiboot-c5689dbef4f3c8af565d2807bb65d1f6b7d6f9f8.tar.bz2 |
Add scripts to run from Mambo
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'external')
-rw-r--r-- | external/mambo/mambo_utils.tcl | 255 | ||||
-rw-r--r-- | external/mambo/skiboot.tcl | 107 |
2 files changed, 362 insertions, 0 deletions
diff --git a/external/mambo/mambo_utils.tcl b/external/mambo/mambo_utils.tcl new file mode 100644 index 0000000..6156564 --- /dev/null +++ b/external/mambo/mambo_utils.tcl @@ -0,0 +1,255 @@ + +# +# behave like gdb +# +proc p { reg { t 0 } { c 0 } } { + switch -regexp $reg { + ^r[0-9]+$ { + regexp "r(\[0-9\]*)" $reg dummy num + set val [mysim cpu $c thread $t display gpr $num] + puts "$val" + } + ^f[0-9]+$ { + regexp "f(\[0-9\]*)" $reg dummy num + set val [mysim cpu $c thread $t display fpr $num] + puts "$val" + } + ^v[0-9]+$ { + regexp "v(\[0-9\]*)" $reg dummy num + set val [mysim cpu $c thread $t display vmxr $num] + puts "$val" + } + default { + set val [mysim cpu $c thread $t display spr $reg] + puts "$val" + } + } +} + +# +# behave like gdb +# +proc sr { reg val {t 0}} { + switch -regexp $reg { + ^r[0-9]+$ { + regexp "r(\[0-9\]*)" $reg dummy num + mysim cpu 0:$t set gpr $num $val + } + ^f[0-9]+$ { + regexp "f(\[0-9\]*)" $reg dummy num + mysim cpu 0:$t set fpr $num $val + } + ^v[0-9]+$ { + regexp "v(\[0-9\]*)" $reg dummy num + mysim cpu 0:$t set vmxr $num $val + } + default { + mysim cpu 0:$t set spr $reg $val + } + } + p $reg $t +} + +proc b { addr } { + mysim trigger set pc $addr "just_stop" + set at [i $addr] + puts "breakpoint set at $at" +} + +proc wr { start stop } { + mysim trigger set memory system w $start $stop 0 "just_stop" +} + +proc c { } { + mysim go +} + +proc i { pc { t 0 } { c 0 } } { + set pc_laddr [mysim cpu $c util itranslate $pc] + set inst [mysim cpu $c memory display $pc_laddr 4] + set disasm [mysim cpu $c util ppc_disasm $inst $pc] + return "[$c:$t]: $pc ($pc_laddr) Enc:$inst : $disasm" +} + +proc ipc { {t 0} {c 0}} { + set pc [mysim cpu $c thread $t display spr pc] + i $pc $t $c +} + +proc ipca { } { + set cpus [myconf query cpus] + set threads [myconf query processor/number_of_threads] + + for { set i 0 } { $i < $cpus } { incr i 1 } { + for { set j 0 } { $j < $threads } { incr j 1 } { + puts [ipc $j $i] + } + } +} + +proc pa { spr } { + set cpus [myconf query cpus] + set threads [myconf query processor/number_of_threads] + + for { set i 0 } { $i < $cpus } { incr i 1 } { + for { set j 0 } { $j < $threads } { incr j 1 } { + set val [mysim cpu $i thread $j display spr $spr] + puts "CPU: $i THREAD: $j SPR $spr = $val" + } + } +} + +proc s { } { + mysim step 1 + ipca +} + +proc z { count } { + while { $count > 0 } { + s + incr count -1 + } +} + +proc sample_pc { sample count } { + while { $count > 0 } { + mysim cycle $sample + ipc + incr count -1 + } +} + +proc e2p { ea } { + set pa [ mysim util dtranslate $ea ] + puts "$pa" +} + +proc x { pa { size 8 } } { + set val [ mysim memory display $pa $size ] + puts "$pa : $val" +} + +proc it { ea } { + mysim util itranslate $ea +} +proc dt { ea } { + mysim util dtranslate $ea +} + +proc ex { ea { size 8 } } { + set pa [ mysim util dtranslate $ea ] + set val [ mysim memory display $pa $size ] + puts "$pa : $val" +} + +proc hexdump { location count } { + set addr [expr $location & 0xfffffffffffffff0] + set top [expr $addr + ($count * 15)] + for { set i $addr } { $i < $top } { incr i 16 } { + set val [expr $i + (4 * 0)] + set val0 [format "%08x" [mysim memory display $val 4]] + set val [expr $i + (4 * 1)] + set val1 [format "%08x" [mysim memory display $val 4]] + set val [expr $i + (4 * 2)] + set val2 [format "%08x" [mysim memory display $val 4]] + set val [expr $i + (4 * 3)] + set val3 [format "%08x" [mysim memory display $val 4]] + set ascii "(none)" + set loc [format "0x%016x" $i] + puts "$loc: $val0 $val1 $val2 $val3 $ascii" + } +} + +proc slbv {} { + puts [mysim cpu 0 display slb valid] +} + +proc regs { { t 0 } { c 0 } } { + puts "GPRS:" + puts [mysim cpu $c thread $t display gprs] +} + +proc tlbv { { c 0 } } { + puts "$c:TLB: ----------------------" + puts [mysim cpu $c display tlb valid] +} + +proc just_stop { args } { + simstop + ipca +} + +proc st { count } { + set sp [mysim cpu 0 display gpr 1] + puts "SP: $sp" + ipc + set lr [mysim cpu 0 display spr lr] + i $lr + while { $count > 0 } { + set sp [mysim util itranslate $sp] + set lr [mysim memory display [expr $sp++16] 8] + i $lr + set sp [mysim memory display $sp 8] + + incr count -1 + } +} + +proc mywatch { } { + while { [mysim memory display 0x700 8] != 0 } { + mysim cycle 1 + } + puts "condition occured " + ipc +} + +# +# force gdb to attach +# +proc gdb { {t 0} } { + mysim set fast off + mysim debugger wait $t +} + +proc egdb { {t 0} } { + set srr0 [mysim cpu 0 display spr srr0] + set srr1 [mysim cpu 0 display spr srr1] + mysim cpu 0 set spr pc $srr0 + mysim cpu 0 set spr msr $srr1 + gdb $t +} + +proc bt { {sp 0} } { + set t 0 + if { $sp < 16 } { + set t $sp + set sp 0 + } + if { $sp == 0 } { + set sp [mysim cpu 0:$t display gpr 1] + } + set lr [mysim cpu 0:$t display spr lr] + puts "backtrace thread $t, stack $sp" + i $lr + while { 1 == 1 } { + set pa [ mysim util dtranslate $sp ] + set bc [ mysim memory display $pa 8 ] + set cr [ mysim memory display [expr $pa+8] 8 ] + set lr [ mysim memory display [expr $pa+16] 8 ] + i $lr + if { $bc == 0 } { return } + set sp $bc + } +} + +proc ton { } {mysim mode turbo } +proc toff { } {mysim mode simple } + +proc don { opt } { + simdebug set $opt 1 +} + +proc doff { opt } { + simdebug set $opt 0 +} + diff --git a/external/mambo/skiboot.tcl b/external/mambo/skiboot.tcl new file mode 100644 index 0000000..ba8bfa4 --- /dev/null +++ b/external/mambo/skiboot.tcl @@ -0,0 +1,107 @@ +# need to get images path defined early +source $env(LIB_DIR)/ppc/util.tcl + +proc mconfig { name env_name def } { + global mconf + global env + + if { [info exists env($env_name)] } { set mconf($name) $env($env_name) } + if { ![info exists mconf($name)] } { set mconf($name) $def } +} + +mconfig threads THREADS 1 +mconfig memory MEM_SIZE 1G + +# Should we stop on an illeagal instruction +mconfig stop_on_ill MAMBO_STOP_ON_ILL false + +# Location of application binary to load +mconfig boot_image SKIBOOT ../../skiboot.lid + +# Boot: Memory location to load boot_image, for binary or vmlinux +mconfig boot_load MAMBO_BOOT_LOAD 0 + +# Boot: Value of PC after loading, for binary or vmlinux +mconfig boot_pc MAMBO_BOOT_PC 0x10 + +# Payload: Allow for a Linux style ramdisk/initrd +mconfig payload PAYLOAD /tmp/zImage.epapr + +# Paylod: Memory location for a Linux style ramdisk/initrd +mconfig payload_addr PAYLOAD_ADDR 0x20000000; + +# FW: Where should ePAPR Flat Devtree Binary be loaded +mconfig epapr_dt_addr EPAPR_DT_ADDR 0x1f00000;# place at 31M + +define dup pegasus myconf +myconf config processor/number_of_threads $mconf(threads) +myconf config memory_size $mconf(memory) +myconf config processor_option/ATTN_STOP true +myconf config processor_option/stop_on_illegal_instruction $mconf(stop_on_ill) +myconf config UART/0/enabled false +myconf config SimpleUART/enabled false +myconf config enable_rtas_support false +myconf config processor/cpu_frequency 512M +myconf config processor/timebase_frequency 1/1 +myconf config enable_pseries_nvram false + +define machine myconf mysim + +source $env(LIB_DIR)/common/epapr.tcl + +if {![info exists of::encode_compat]} { + source $env(LIB_DIR)/common/openfirmware_utils.tcl +} + +# xscom +set xscom_base 0x1A0000000000 +mysim xscom create $xscom_base + +# Device tree fixups + +set root_node [mysim of find_device "/"] + +mysim of addprop $root_node string "epapr-version" "ePAPR-1.0" +mysim of setprop $root_node "compatible" "ibm,powernv" + +set cpus_node [mysim of find_device "/cpus"] +mysim of addprop $cpus_node int "#address-cells" 1 +mysim of addprop $cpus_node int "#size-cells" 0 + +set cpu0_node [mysim of find_device "/cpus/PowerPC@0"] +mysim of addprop $cpu0_node int "ibm,chip-id" 0 + +set mem0_node [mysim of find_device "/memory@0"] +mysim of addprop $mem0_node int "ibm,chip-id" 0 + +set xscom_node [ mysim of addchild $root_node xscom [format %x $xscom_base]] +set reg [list $xscom_base 0x10000000] +mysim of addprop $xscom_node array64 "reg" reg +mysim of addprop $xscom_node empty "scom-controller" "" +mysim of addprop $xscom_node int "ibm,chip-id" 0 +mysim of addprop $xscom_node int "#address-cells" 1 +mysim of addprop $xscom_node int "#size-cells" 1 +set compat [list] +lappend compat "ibm,xscom" +lappend compat "ibm,power8-xscom" +set compat [of::encode_compat $compat] +mysim of addprop $xscom_node byte_array "compatible" $compat + +epapr::of2dtb mysim $mconf(epapr_dt_addr) + +set boot_size [file size $mconf(boot_image)] +mysim memory fread $mconf(boot_load) $boot_size $mconf(boot_image) + +set payload_size [file size $mconf(payload)] +mysim memory fread $mconf(payload_addr) $payload_size $mconf(payload) + +for { set i 0 } { $i < $mconf(threads) } { incr i } { + mysim mcm 0 cpu 0 thread $i set spr pc $mconf(boot_pc) + mysim mcm 0 cpu 0 thread $i set gpr 3 $mconf(epapr_dt_addr) + mysim mcm 0 cpu 0 thread $i config_on +} + +source mambo_utils.tcl + +ton + |