Add skiboot-5.1-beta1 release notes

Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 94 insertions, 0 deletions

diff --git a/doc/release-notes/skiboot-5.1-beta1.txt b/doc/release-notes/skiboot-5.1-beta1.txt
new file mode 100644
index 0000000..6799ae4
--- /dev/null
+++ b/doc/release-notes/skiboot-5.1-beta1.txt
@@ -0,0 +1,94 @@
+skiboot-5.1-beta1
+-----------------
+
+Skiboot 5.1-beta1 contains all fixes from skiboot-5.0 stable branch up to
+skiboot-5.0.5.
+
+Over skiboot-5.0, the following features have been added:
+- Centaur i2c support
+- Add Naples chip (CPU, PHB, LPC serial interrupts) support
+- Added qemu platform
+- improvements to FSI error handling
+- improvements in chip TOD failover (some only on FSP systems)
+- Set Relative Priority Register (RPR) to recommended value
+  - this affects thread priority in SMT modes
+- greatly reduce memory consumption by CPU stacks for non-present CPUs
+  - Previously we would reserve enough memory for max PIR for each CPU
+    type.
+  - This fix frees up 77MB of RAM on a typical P8 system.
+- increased OPAL API documentation
+- Asynchronous preloading of resources from FSP/flash
+  - improves boot time on some systems
+- Basic Garrison platform support
+- Add Mambo platform (P8 Functional Simulator, systemsim)
+  - includes fake NVRAM, RTC
+- Support building with GCOV, increasing memory for skiboot binary to 2MB
+  - includes boot code coverage testing
+- Increased skiboot HEAP size.
+  - We are not aware of any system where you would run out, but on large
+    systems it was getting closer than we liked.
+- add boot_tests.sh for helping automate boot testing on FSP and BMC machines
+- Versioning of pflash and gard utilities to help Linux (or other OS)
+  distributions with packaging.
+- OCC throttle status messages to host
+- CAPP timebase sync ("ibm,capp-timebase-sync" in DT to indicate CAPP timebase
+  was synced by OPAL)
+
+New features for FSP based machines:
+- in-band IPMI support
+- ethernet adaptor location codes
+- add DIMM frequency information to device tree
+- improvements in FSP error log code paths
+- fix some boot time memory leaks
+  - harmless to end user
+
+New features for AMI BMC based machines:
+- PCIe power workaround for K80
+- Added support for Macronix 128Mbit flash chips
+- PRD for Firestone platform
+- improved reliability when BMC reboots
+
+The following bugs have been fixed:
+- Increase PHB3 timeout for electrical links coming up to 2 seconds.
+  - fixes issues with some Mellanox cards
+- Hang in opal_reinit_cpus() that could prevent kdump from functioning
+- PHB3: fix crash in phb3_init
+- PHB3: fix crash with fenced PHB in phb3_init_hw()
+- Fix bugs in hw/bt.c (interface for IPMI on BMC machines) that could possibly
+  lead to a crash (dereferencing invalid address, deadlock)
+- ipmi/sel: fix use-after-free
+- Bug fixes in EEH handling
+  - opal_pci_next_error() cleared OPAL_EVENT_PCI_ERROR unconditionally, possibly
+    leading to missed errors.
+FSP-specific bugs fixed:
+- (also fixed in skiboot-5.0.2) Fix race in firenze_get_slot_info() leading to
+  assert() with many PCI cards
+    With many PCI cards, we'd hit a race where calls to
+    firenze_add_pcidev_to_fsp_inventory would step on each other leading to
+    memory corruption and finally an assert() in the allocator being hit
+    during boot.
+- PCIe power workaround for K80 cards
+- /ibm,opal/led renamed to /ibm,opal/leds in Device Tree
+  - compatible change as no FSP based systems shipped with skiboot-5.0
+
+General improvements:
+- don't run pollers on non-boot CPUs in time_wait
+- improvements to opal-prd, pflash, libflash
+  - including new blocklevel interface in libflash
+- many minor fixes to issues found by static analysis
+- improvements in FSP error log code paths
+- code cleanup in memory allocator
+- Don't expose individual nvram partitions in the device tree, just the whole
+  flash device.
+- build improvements for building on ppc64el host
+- improvements in cpu_relax() for idle threads, needed for GCOV on large
+  machines.
+- Optimized memset() for POWER8, greatly reducing number of instructions
+  executed for boot, which helps boot time in simulators.
+- Major improvements in hello_world kernel
+  - Bloat of huge 17 instruction test case reduced to 10.
+- Disable bust_locks for general calls of abort()
+  - Should enable better error messages during abort() when other users of
+    LPC bus exist (e.g. flash)
+
+