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| author | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-07-27 17:43:05 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-08-02 17:31:12 +1000 |
| commit | c90c25742ad3d41c66d88c22358ddd2a76194900 (patch) | |
| tree | e2a0a86502224ae9acb462b7b98e0a772a1a30e3 /doc/xscom-node-bindings.rst | |
| parent | cce80be2fc7d9114ea0000349cc52f0947ea00f1 (diff) | |
| download | skiboot-c90c25742ad3d41c66d88c22358ddd2a76194900.zip skiboot-c90c25742ad3d41c66d88c22358ddd2a76194900.tar.gz skiboot-c90c25742ad3d41c66d88c22358ddd2a76194900.tar.bz2 | |
doc/*.rst: fix ReSTructured text syntax
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'doc/xscom-node-bindings.rst')
| -rw-r--r-- | doc/xscom-node-bindings.rst | 34 |
1 files changed, 20 insertions, 14 deletions
diff --git a/doc/xscom-node-bindings.rst b/doc/xscom-node-bindings.rst index 0c2545e..0fd5e93 100644 --- a/doc/xscom-node-bindings.rst +++ b/doc/xscom-node-bindings.rst @@ -1,18 +1,22 @@ +XSCOM Bindings +============== + XSCOM regions -============= +------------- The top-level xscom nodes specify the mapping range from the 64-bit address space into the PCB address space. There's one mapping range per chip xscom, therefore one node per mapping range. +:: -/ -/xscom@<chip-base-address-0>/ -/xscom@<chip-base-address-1>/ -… -/xscom@<chip-base-address-n>/ + / + /xscom@<chip-base-address-0>/ + /xscom@<chip-base-address-1>/ + … + /xscom@<chip-base-address-n>/ -- where <chip-base-address-n> is the xscom base address with the gcid-specific +* where <chip-base-address-n> is the xscom base address with the gcid-specific bits (for chip n) OR-ed in. Each xscom node has the following properties: @@ -25,17 +29,18 @@ Each xscom node has the following properties: Chiplet endpoints -================= +----------------- One sub-node per endpoint. Endpoints are defined by their (port, endpoint-address) data on the PCB, and are named according to their endpoint types: +:: -/xscom@<chip-base-address>/ -/xscom@<chip-base-address>/chiptod@<endpoint-addr> -/xscom@<chip-base-address>/lpc@<endpoint-addr> + /xscom@<chip-base-address>/ + /xscom@<chip-base-address>/chiptod@<endpoint-addr> + /xscom@<chip-base-address>/lpc@<endpoint-addr> -- where the <endpoint-addr> is a single address (as distinct from the current +* where the <endpoint-addr> is a single address (as distinct from the current (gcid,base) format), consisting of the SCOM port and SCOM endpoint bits in their 31-bit address format. @@ -46,12 +51,13 @@ Each endpoint node has the following properties: The endpoint address specifies the address on the PCB. So, to calculate the MMIO address for a PCB register: +:: mmio_addr = <xscom-base-addr> | (pcb_addr[1:27] << 4) | (pcb_addr[28:31] << 3) Where: - - xscom-base-addr is the address from the first two cells of the parent + * xscom-base-addr is the address from the first two cells of the parent node's reg property - - pcb_addr is the first cell of the endpoint's reg property + * pcb_addr is the first cell of the endpoint's reg property |