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| author | Alistair Popple <alistair@popple.id.au> | 2015-10-29 14:12:30 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-11-12 16:37:26 +1100 |
| commit | 03c6c2de0a0bb8d553d2d1c87f266d43610a0532 (patch) | |
| tree | 865b95f6f005a1fedda016e044379635e9e7212f /doc/device-tree | |
| parent | 5adf85d444b9818ad3f85f32b256c4015cccb56c (diff) | |
| download | skiboot-03c6c2de0a0bb8d553d2d1c87f266d43610a0532.zip skiboot-03c6c2de0a0bb8d553d2d1c87f266d43610a0532.tar.gz skiboot-03c6c2de0a0bb8d553d2d1c87f266d43610a0532.tar.bz2 | |
Add Nvlink documentation including device tree bindings
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'doc/device-tree')
| -rw-r--r-- | doc/device-tree/nvlink.txt | 137 |
1 files changed, 137 insertions, 0 deletions
diff --git a/doc/device-tree/nvlink.txt b/doc/device-tree/nvlink.txt new file mode 100644 index 0000000..70e9545 --- /dev/null +++ b/doc/device-tree/nvlink.txt @@ -0,0 +1,137 @@ +=========================== +Nvlink Device Tree Bindings +=========================== + +See doc/nvlink.txt for general Nvlink information. + +NPU bindings: + +xscom@3fc0000000000 { + npu@8013c00 { + reg = <0x8013c00 0x2c>; + compatible = "ibm,power8-npu"; + ibm,npu-index = <0x0>; + ibm,npu-links = <0x4>; + +; Number of links wired up to this npu. + + phandle = <0x100002bc>; + linux,phandle = <0x100002bc>; + + link@0 { + ibm,npu-pbcq = <0x1000000b>; + +; phandle to the pbcq which connects to the GPU. + + ibm,npu-phy = <0x80000000 0x8010c3f>; + +; SCOM address of the IBM PHY controlling this link. + + compatible = "ibm,npu-link"; + ibm,npu-lane-mask = <0xff>; + +; Mask specifying which IBM PHY lanes are used for this link. + + phandle = <0x100002bd>; + ibm,npu-link-index = <0x0>; + +; Hardware link index. Naples systems contain links at index 0,1,4 & 5. +; Used to calculate various address offsets. + + linux,phandle = <0x100002bd>; + }; + + link@1 { + ibm,npu-pbcq = <0x1000000b>; + ibm,npu-phy = <0x80000000 0x8010c3f>; + compatible = "ibm,npu-link"; + ibm,npu-lane-mask = <0xff00>; + phandle = <0x100002be>; + ibm,npu-link-index = <0x1>; + linux,phandle = <0x100002be>; + }; + + link@4 { + ibm,npu-pbcq = <0x1000000a>; + ibm,npu-phy = <0x80000000 0x8010c7f>; + compatible = "ibm,npu-link"; + ibm,npu-lane-mask = <0xff00>; + phandle = <0x100002bf>; + ibm,npu-link-index = <0x4>; + linux,phandle = <0x100002bf>; + }; + + link@5 { + ibm,npu-pbcq = <0x1000000a>; + ibm,npu-phy = <0x80000000 0x8010c7f>; + compatible = "ibm,npu-link"; + ibm,npu-lane-mask = <0xff>; + phandle = <0x100002c0>; + ibm,npu-link-index = <0x5>; + linux,phandle = <0x100002c0>; + }; + }; +}; + +Emulated PCI device bindings: + + pciex@3fff000400000 { + ibm,npcq = <0x100002bc>; + +; phandle to the NPU node. Used to find associated PCI GPU devices. + + compatible = "ibm,power8-npu-pciex", "ibm,ioda2-npu-phb"; + + pci@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + revision-id = <0x0>; + interrupts = <0x1>; + device-id = <0x4ea>; + ibm,pci-config-space-type = <0x1>; + vendor-id = <0x1014>; + ibm,gpu = <0x100002f7>; + +; phandle pointing the associated GPU PCI device node + + phandle = <0x100002fc>; + }; + + pci@1 { + reg = <0x800 0x0 0x0 0x0 0x0>; + revision-id = <0x0>; + interrupts = <0x1>; + device-id = <0x4ea>; + ibm,pci-config-space-type = <0x1>; + vendor-id = <0x1014>; + ibm,gpu = <0x100002f5>; + phandle = <0x100002fe>; + class-code = <0x60400>; + linux,phandle = <0x100002fe>; + }; + + pci@0,1 { + reg = <0x100 0x0 0x0 0x0 0x0>; + revision-id = <0x0>; + interrupts = <0x2>; + device-id = <0x4ea>; + ibm,pci-config-space-type = <0x1>; + vendor-id = <0x1014>; + ibm,gpu = <0x100002f7>; + phandle = <0x100002fd>; + class-code = <0x60400>; + linux,phandle = <0x100002fd>; + }; + + pci@1,1 { + reg = <0x900 0x0 0x0 0x0 0x0>; + revision-id = <0x0>; + interrupts = <0x2>; + device-id = <0x4ea>; + ibm,pci-config-space-type = <0x1>; + vendor-id = <0x1014>; + ibm,gpu = <0x100002f5>; + phandle = <0x100002ff>; + class-code = <0x60400>; + linux,phandle = <0x100002ff>; + }; + }; |