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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-07-07 11:49:59 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-07-08 18:18:08 +1000 |
| commit | a9aaca4d10b857d427a5b6e4851ea76711c031e8 (patch) | |
| tree | cfb3a9287648ef5b6cb49f3d27efb9631f68cbee /doc/device-tree | |
| parent | 83242dbdc9608ecc36f72ca7e66959f5ddabdfaa (diff) | |
| download | skiboot-a9aaca4d10b857d427a5b6e4851ea76711c031e8.zip skiboot-a9aaca4d10b857d427a5b6e4851ea76711c031e8.tar.gz skiboot-a9aaca4d10b857d427a5b6e4851ea76711c031e8.tar.bz2 | |
lpc: Example DT update for P9 LPC bus
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'doc/device-tree')
| -rw-r--r-- | doc/device-tree/examples/power9-phb4.dts | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/doc/device-tree/examples/power9-phb4.dts b/doc/device-tree/examples/power9-phb4.dts index 46e8999..2735964 100644 --- a/doc/device-tree/examples/power9-phb4.dts +++ b/doc/device-tree/examples/power9-phb4.dts @@ -153,4 +153,40 @@ compatible = "ibm,power9-xive-x"; }; }; + + lpcm-opb@6030000000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ibm,power9-lpcm-opb", "simple-bus"; + ibm,chip-id = <0x0>; + ranges = < 0x00000000 0x60300 0x00000000 0x80000000 + 0x80000000 0x60300 0x80000000 0x80000000 >; + opb-master@c0010000 { + compatible = "ibm,power9-lpcm-opb-master"; + reg = < 0xc0010000 0x60 >; + }; + opb-arbiter@c0011000 { + compatible = "ibm,power9-lpcm-opb-arbiter"; + reg = < 0xc0011000 0x8 >; + }; + lpc-controller@c0012000 { + compatible = "ibm,power9-lpc-controller"; + reg = < 0xc0012000 0x100 >; + }; + lpc@f0000000 { + compatible = "ibm,power9-lpc"; + #address-cells = <2>; + #size-cells = <1>; + ranges = < 3 0 0xf0000000 0x10000000 /* FW space */ + 0 0 0xe0000000 0x10000000 /* MEM space */ + 1 0 0xd0010000 0x00010000 /* IO space */ >; + serial@i3f8 { + compatible = "ns16550"; + reg = < 1 0x3f8 0x10 >; + current-speed = < 115200 >; + clock-frequency = < 1843200 >; + }; + }; + }; + }; |