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| author | Nicholas Piggin <npiggin@gmail.com> | 2019-01-08 00:04:24 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-02-13 14:36:43 +1100 |
| commit | 37baa9731d0d07cfcc3201105e5c57a07ad91efc (patch) | |
| tree | d4074e65fa75f16fd0ce995fc13036abf68141ad /core | |
| parent | 75669cb37067b52f80f43858a2eb9fac69b451ee (diff) | |
| download | skiboot-37baa9731d0d07cfcc3201105e5c57a07ad91efc.zip skiboot-37baa9731d0d07cfcc3201105e5c57a07ad91efc.tar.gz skiboot-37baa9731d0d07cfcc3201105e5c57a07ad91efc.tar.bz2 | |
core/fast-reboot: fast reboot specific sreset patch
Provide an sreset handler specifically for fast reboots, which allows
FIXUP_ENDIAN to be removed from the normal sreset handler in the next
patch.
The save_1 == 0 condition is no longer required to signal a fast
reboot.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'core')
| -rw-r--r-- | core/fast-reboot.c | 19 | ||||
| -rw-r--r-- | core/init.c | 13 |
2 files changed, 20 insertions, 12 deletions
diff --git a/core/fast-reboot.c b/core/fast-reboot.c index d3cc8cf..d841474 100644 --- a/core/fast-reboot.c +++ b/core/fast-reboot.c @@ -110,7 +110,6 @@ static bool fast_reboot_sanity_check(void) void fast_reboot(void) { - struct cpu_thread *cpu; static int fast_reboot_count = 0; if (!chip_quirk(QUIRK_MAMBO_CALLOUTS) && @@ -157,19 +156,15 @@ void fast_reboot(void) return; } + cpu_set_sreset_enable(false); + cpu_set_ipi_enable(false); + /* * There is no point clearing special wakeup or un-quiesce due to * failure after this point, because we will be going to full IPL. * Less cleanup work means less opportunity to fail. */ - for_each_ungarded_cpu(cpu) { - /* Also make sure that saved_r1 is 0 ! That's what will - * make our reset vector jump to fast_reboot_entry - */ - cpu->save_r1 = 0; - } - /* * Move SPRs and exception vectors back to OPAL-mode while all * others are quiesced. MSR[ME] is disabled while these are switched, @@ -206,7 +201,7 @@ void fast_reboot(void) * sreset vector has a FIXUP_ENDIAN sequence at the start, so * secondaries can cope. */ - copy_sreset_vector(); + copy_sreset_vector_fast_reboot(); /* Send everyone else to 0x100 */ if (sreset_all_others() != OPAL_SUCCESS) { @@ -374,9 +369,8 @@ void __noreturn fast_reboot_entry(void) */ cpu_state_wait_all_others(cpu_state_present, 0); - if (proc_gen == proc_gen_p9) { + if (proc_gen == proc_gen_p9) xive_reset(); - } prlog(PR_INFO, "RESET: Releasing secondaries...\n"); @@ -405,6 +399,9 @@ void __noreturn fast_reboot_entry(void) /* Let the CPU layer do some last minute global cleanups */ cpu_fast_reboot_complete(); + /* Restore OPAL's sreset vector now that all CPUs have HILE clear */ + copy_sreset_vector(); + /* We can now do NAP mode */ cpu_set_sreset_enable(true); cpu_set_ipi_enable(true); diff --git a/core/init.c b/core/init.c index 3f7dd14..e095507 100644 --- a/core/init.c +++ b/core/init.c @@ -793,7 +793,18 @@ void copy_sreset_vector(void) while(src < &reset_patch_end) *(dst++) = *(src++); sync_icache(); - cpu_set_sreset_enable(true); +} + +void copy_sreset_vector_fast_reboot(void) +{ + uint32_t *src, *dst; + + /* Copy the reset code over the entry point. */ + src = &reset_fast_reboot_patch_start; + dst = (uint32_t *)0x100; + while(src < &reset_fast_reboot_patch_end) + *(dst++) = *(src++); + sync_icache(); } void copy_exception_vectors(void) |