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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2018-08-14 16:45:03 +1000
committerStewart Smith <stewart@linux.ibm.com>2018-08-15 22:41:30 -0500
commitef79d0370737130256168d20a9bf40f06001af88 (patch)
treea54744098c758b7b685adce77552c148eb34e711 /core
parentf737777b34382d5293901c4a5040b1fad05294a0 (diff)
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i2c: Ensure ordering between i2c_request_send() and completion
i2c_request_send loops waiting for a flag "uc.done" set by the completion routine, and then look for a result code also set by that same completion. There is no synchronization, the completion can happen on another processor, so we need to order the stores to uc and the reads from uc so that uc.done is stored last and tested first using memory barriers. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'core')
-rw-r--r--core/i2c.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/core/i2c.c b/core/i2c.c
index 070a0f6..e833310 100644
--- a/core/i2c.c
+++ b/core/i2c.c
@@ -20,6 +20,7 @@
#include <device.h>
#include <opal-msg.h>
#include <timebase.h>
+#include <processor.h>
static LIST_HEAD(i2c_bus_list);
@@ -148,6 +149,7 @@ static void i2c_sync_request_complete(int rc, struct i2c_request *req)
{
struct i2c_sync_userdata *ud = req->user_data;
ud->rc = rc;
+ lwsync();
ud->done = true;
}
@@ -222,6 +224,7 @@ int i2c_request_send(int bus_id, int dev_addr, int read_write,
waited += time_to_wait;
} while (!ud.done);
+ lwsync();
rc = ud.rc;
/* error or success */