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| author | Michael Neuling <mikey@neuling.org> | 2017-08-21 17:16:06 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-08-22 11:59:17 +1000 |
| commit | a5c124072f671f3dfda1405de77dd4ad373c3dd9 (patch) | |
| tree | f410377d403fbeb22ba7d37a45fcf9e06e55442e /core | |
| parent | 916bc2d8da8fee71653c325cc752f0ce901a58a2 (diff) | |
| download | skiboot-a5c124072f671f3dfda1405de77dd4ad373c3dd9.zip skiboot-a5c124072f671f3dfda1405de77dd4ad373c3dd9.tar.gz skiboot-a5c124072f671f3dfda1405de77dd4ad373c3dd9.tar.bz2 | |
vas: Set FIRs according to workbook
This sets the FIR, FIR mask and FIR action registers according to VAS
workbook v1.20. It also renames them to make it clear what they are.
Without this any VAS error will checkstop the machine, rather than
potentially be recoverable.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core')
| -rw-r--r-- | core/vas.c | 16 |
1 files changed, 5 insertions, 11 deletions
@@ -117,17 +117,11 @@ static inline int reset_north_ctl(struct proc_chip *chip) static void reset_fir(struct proc_chip *chip) { - uint64_t val; - - val = 0x0ULL; - vas_scom_write(chip, VAS_FIR0, val); - vas_scom_write(chip, VAS_FIR1, val); - vas_scom_write(chip, VAS_FIR2, val); - vas_scom_write(chip, VAS_FIR3, val); - vas_scom_write(chip, VAS_FIR4, val); - vas_scom_write(chip, VAS_FIR5, val); - vas_scom_write(chip, VAS_FIR6, val); - vas_scom_write(chip, VAS_FIR7, val); + vas_scom_write(chip, VAS_FIR0, 0x0000000000000000ULL); + /* From VAS workbook */ + vas_scom_write(chip, VAS_FIR_MASK, 0x000001000001ffffULL); + vas_scom_write(chip, VAS_FIR_ACTION0, 0xf800fdfc0001ffffull); + vas_scom_write(chip, VAS_FIR_ACTION1, 0xf8fffefffffc8000ull); } #define RMA_LSMP_64K_SYS_ID PPC_BITMASK(8, 12) |