pci: Add ability to trace timing

PCI link training is responsible for a huge chunk of the skiboot boot
time, so add the ability to trace it waiting in the main state
machine.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/core/pci.c b/core/pci.c
index 907160d..49e5bed 100644
--- a/core/pci.c
+++ b/core/pci.c
@@ -967,6 +967,7 @@ static void pci_reset_phb(void *data)
 	pci_slot_add_flags(slot, PCI_SLOT_FLAG_BOOTUP);
 	rc = slot->ops.freset(slot);
 	while (rc > 0) {
+		PCITRACE(phb, 0, "Waiting %ld ms\n", tb_to_msecs(rc));
 		time_wait(rc);
 		rc = slot->ops.run_sm(slot);
 	}