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authorMichael Neuling <mikey@neuling.org>2018-03-06 17:10:55 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2018-03-06 18:33:47 -0600
commit75a89e61c9d97e662b80b19126607d20527815e9 (patch)
treefbc927f6d8e799b2bdd57a9c3ba9448d77b82539 /core/pci.c
parent5ba69bb62ca25ab0bc98aa41b46f7e9fd00d9a7f (diff)
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pci: Reduce log level of error message
If a link doesn't train, we can end up with error messages like this: [ 63.027261959,3] PHB#0032[8:2]: LINK: Timeout waiting for electrical link [ 63.027265573,3] PHB#0032:00:00.0 Error -6 resetting The first message is useful but the second message is just debug from the core PCI code and is confusing to print to the console. This reduces the second print to debug level so it's not seen by the console by default. Signed-off-by: Michael Neuling <mikey@neuling.org> Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core/pci.c')
-rw-r--r--core/pci.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/core/pci.c b/core/pci.c
index 982012f..3fc4854 100644
--- a/core/pci.c
+++ b/core/pci.c
@@ -987,7 +987,7 @@ static void pci_reset_phb(void *data)
}
pci_slot_remove_flags(slot, PCI_SLOT_FLAG_BOOTUP);
if (rc < 0)
- PCIERR(phb, 0, "Error %lld resetting\n", rc);
+ PCIDBG(phb, 0, "Error %lld resetting\n", rc);
}
static void pci_scan_phb(void *data)