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authorAndrew Donnellan <andrew.donnellan@au1.ibm.com>2017-01-27 18:33:14 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-03-20 11:23:33 +1100
commita1eba9d29d17ff44fca1293b071023a9fbf4b938 (patch)
tree2f83b37f459a332b8b6057025575b583ca1d2ae6 /core/pci.c
parent37546ae6fdd01dbdac40e56d4f7725b3a9a902a1 (diff)
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fast-reboot: creset PHBs on fast reboot
On fast reboot, perform a creset of all PHBs. This ensures that any PHBs that are fenced will be working after the reboot. A later patch will disable CAPI mode during cresets - as such, PHBs in CAPI mode will return to regular PCIe mode during a fast reboot. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core/pci.c')
-rw-r--r--core/pci.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/core/pci.c b/core/pci.c
index 4e417c1..ecb94c2 100644
--- a/core/pci.c
+++ b/core/pci.c
@@ -1528,6 +1528,8 @@ static void __pci_reset(struct list_head *list)
void pci_reset(void)
{
unsigned int i;
+ struct pci_slot *slot;
+ int64_t rc;
prlog(PR_NOTICE, "PCI: Clearing all devices...\n");
@@ -1539,6 +1541,25 @@ void pci_reset(void)
if (!phb)
continue;
__pci_reset(&phb->devices);
+
+ slot = phb->slot;
+ if (!slot || !slot->ops.creset) {
+ PCINOTICE(phb, 0, "Can't do complete reset\n");
+ } else {
+ rc = slot->ops.creset(slot);
+ while (rc > 0) {
+ time_wait(rc);
+ rc = slot->ops.poll(slot);
+ }
+ if (rc < 0) {
+ PCIERR(phb, 0, "Complete reset failed, aborting"
+ "fast reboot (rc=%lld)\n", rc);
+ if (platform.cec_reboot)
+ platform.cec_reboot();
+ while (true) {}
+ }
+ }
+
if (phb->ops->ioda_reset)
phb->ops->ioda_reset(phb, true);
}