diff options
| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2017-03-30 10:05:27 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-03-31 16:57:07 +1100 |
| commit | b878b6828f5b6defd7e5e8b5da38978fda235081 (patch) | |
| tree | d07835a916116f80f15f20811fdee997cf1f8bcc /core/pci.c | |
| parent | 3170dd74cefeae5fa6b65b2b8f99dd54ca06d249 (diff) | |
| download | skiboot-b878b6828f5b6defd7e5e8b5da38978fda235081.zip skiboot-b878b6828f5b6defd7e5e8b5da38978fda235081.tar.gz skiboot-b878b6828f5b6defd7e5e8b5da38978fda235081.tar.bz2 | |
hw/phb4: Locate AER capability position if necessary
Similar to PHB3, phb4_init_rc_cfg() can be called when the PHB is
initialized or reinitialized after complete reset. In the later case,
we needn't locate the AER capability position again and the cached
position can be used as we do for PCIe capability. So several CPU
cycles can be saved. The error message is shortened and meaningless
comment is dropped as well.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'core/pci.c')
0 files changed, 0 insertions, 0 deletions